Aleph J Schematic

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carpenter said:
How about I post what I'm studying now? Your comments are valued; I'm not intentionally playing games. Sometimes I'm just a little dense in the head:


well - I didn't say that I don't like you games :clown:

anyway - what's role of these Q10 and Q11 , across R34 ?

:clown: something is redundant ........ I bet both Qs .....

please - go back and re-read several posts in Aleph J thread where EUVL's proposal is ..... there is exact ( and almost sole) concept how that can be made ;

now you're trying same few things I already drew ..... wasting volts in negative PSU..........
 
Zen Mod said:
now you're trying same few things I already drew .....

Why, that's a fine compliment. ;)

Q10 and Q11? The sim really likes those jfets! The current goes up to 6mA with and practically nothing without them. In fact, the output from the diff pair is much smoother with them, as well. I'll study Patrick's ideas, but I don't think you're so far from the bulls-eye. :)
 

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Official Court Jester
Joined 2003
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carpenter said:


Why, that's a fine compliment. ;)

Q10 and Q11? The sim really likes those jfets! The current goes up to 6mA with and practically nothing without them. In fact, the output from the diff pair is much smoother with them, as well. I'll study Patrick's ideas, but I don't think you're so far from the bulls-eye. :)


either I'm dumb or your sim is :D

try this one ;

it's not A J , but it's X-ed
 

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Official Court Jester
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carpenter said:
I raised R19 to 150K; that brought back a sine wave... What do you think?


are you sure that you don't have some Serbian ancestors ?

sometimes you're same as fast & stubborn as serb :clown:

look here - just as example ;

LU gate MUST BE REFERENCED TO - 24V , where also source must be connected ,via source resistor ;
that means - LU is self- biased ,same as dreky triode /pentode , whatever ........

point is - you have 1K in drain of input Jfet ; 1K is adequate value - as load for that Jfet , and also adequate regarding AC amplitude across it for LU's gate modulation ;

you can't put there every bloody value you can imagine :clown:

CCS , bellow that 1K resistor is there , to achieve 0V DC across 1K resistor ..... in common words - to RELOAD it - DC wise .......

edit - here at my place is p[retty late ....... so - it's completely possible that I made some drek in that schematic ............

and - it can be simpler at least 75% ( without mirrors - just CCS bellow -25V )...... but - without testing I can't say that simpler should be better
 

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