Those AKM chips (4118; 4137 and 449x) doesn't require I2C activity while playing, the software should not use 'polling' method but interrupts (INT0 and INT1 lines of AK4118) to get notified of stream issue.
Then I2C activity only occurs at startup and on specific events such as (4118 only ):
Pratically speaking UNLCK and STC are the two events we usualy encounter while changing of source or samplerate.
Then I2C activity only occurs at startup and on specific events such as (4118 only ):
Pratically speaking UNLCK and STC are the two events we usualy encounter while changing of source or samplerate.
It's not about the noise of I2C but the noise of MCU. If done properly I2C lines and all GPIO lines should go through isolators.
Once did some investigation of the practicality of a digital DC servo for a high gain audio preamp. Found that I2C bus activity could create audible noise in high gain situations. So could noise coupled on the power rails from digital devices. All the noise issues could be fixed, but the cost would have been too much except for a cost is no object type of design.
I like to have fun on the forums studying schemes that use complicated power supplies with exaggerated claims but at the same time simple reconstruction filters are used with reference to GND and thus losing all the advantage of the differential output.
Hi,
I initially looked at the pdn circuit then finished by a wider review…. Here are some comments:
You may encounter issues with the Power Down circuit, the divider made of 2 10k resistor set max voltage to the inputs of Schmitt trigger to VDD/2.
HC14 max high level input threshold (VT+) is slightly dependant of VDD but is close to ¾ VDD.
Depending of the chip you use, it may never detect a high level and then leave the two AKM chip in power down mode. -> remove the resistor to ground or use 100k.
In addition, it is not required to separate the two PDN a single could be used for both chips.
Regarding mute circuit, R2 and R5 values guarantees that 4493 will be always muted as the input of the Schmitt trigger won’t go higher than 33mV -> remove R5, input of HC14 is protected by D2 when power falling.
Regarding 4118:
I initially looked at the pdn circuit then finished by a wider review…. Here are some comments:
You may encounter issues with the Power Down circuit, the divider made of 2 10k resistor set max voltage to the inputs of Schmitt trigger to VDD/2.
HC14 max high level input threshold (VT+) is slightly dependant of VDD but is close to ¾ VDD.
Depending of the chip you use, it may never detect a high level and then leave the two AKM chip in power down mode. -> remove the resistor to ground or use 100k.
In addition, it is not required to separate the two PDN a single could be used for both chips.
Regarding mute circuit, R2 and R5 values guarantees that 4493 will be always muted as the input of the Schmitt trigger won’t go higher than 33mV -> remove R5, input of HC14 is protected by D2 when power falling.
Regarding 4118:
- Maybe it has been said before but using a xtal is mandatory for the 4118, it is used as a reference for sampling frequency detection. See DS page17.
- Regarding supply, there’s no need to have +5V on TVDD. This is a feature targeted to ‘old’ logic TTL compatibility which where running on 5V. TVDD could be directly connected to DVDD. TVDD is internally the supply of the digital input buffers of the chip.
- PSN pin should be high (VDD tied) to set the chip in hardware mode (not controlled by a CPU with I2C), that looks ok on 4493 side.
- If think I’ve read somewhere it’s recommended to ground the Rx input not used.
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Yes, PSN pin on AK4118 should be high for pin control mode.
Xtal for the AK4118 is not mandatory as it can use channel status for sampling frequency detection. I've used channel status without issues.
AK4118 Datasheet says this about RX pins:
"Note1 All input pins except internal biased pins (RX0 7 pins) should not be left floating."
For PDN I've used this:
And as @AIM65 said it can be used for both AK4118 and AK4493.
Xtal for the AK4118 is not mandatory as it can use channel status for sampling frequency detection. I've used channel status without issues.
AK4118 Datasheet says this about RX pins:
"Note1 All input pins except internal biased pins (RX0 7 pins) should not be left floating."
For PDN I've used this:
And as @AIM65 said it can be used for both AK4118 and AK4493.
Where you using Channel status in serial mode or parallel mode ?
DS says that channel status could be used for PLL sync in serial (soft) mode but not in parallel (hardware) as it requires to set up some bits in the control registers.
DS says that channel status could be used for PLL sync in serial (soft) mode but not in parallel (hardware) as it requires to set up some bits in the control registers.
You should set these AK4118 pins according to your needs instead of floating them:
DIF0, DIF1, DIF2, OCKS0, OCKS1, CM0, CM1
Check the datasheet for pin settings.
I've set the format to 24-bit MSB on both 4118 and 4493 according to the datasheet.
Regarding the clock, I've set it to only use PLL and ignore XTAL and to have a maximum sampling frequency of 192kHz.
Schematic updated with the rest of the suggestions.
Attachments
This is the 4493 based smsl SU-1 for 70USD... what say you about this - any obvious ways to improve?
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Fixed. So for 4118: DIF2 = 1, DIF1 = 1, DIF0 = 0
And for 4493: DIF2 = 0, DIF1 = 1, DIF0 = 0