A NOS 192/24 DAC with the PCM1794 (and WaveIO USB input)

Not sure if this is the right thread to ask, but I will try anyway.

I am new to DIY, but considering buiding a version of the DDDAC. I have read, a lot.., but still have more questions than answers I believe:) As the funds for this build is somewhat limited, I have to prioritize in regards to where I spend the money in the chain, and how I set it up. I really like Doedes latest Dac in post 7904, but this is somewhat above my budget.. and I would like to go a bit different route. The budget for the build is around US25K.

I have been wondering about the pre amp part initially. isn't it easier, and possibly better to control this using software instead of an actual pre amp stage? I have not really been able to find an answer to this. I only use digital sources, and I do not have a NAS or USB source for music. It will be only Toslink throug Ians RecieverPi and streaming, and the Toslink source will be switched of when not in use.

So to the actual case... Where to put what part of the budget for best possible sound..

The main parts of "budget consumpsion" are
- Power supply
- The signal recieving part
- Recklocker/Oscillator/Crystal
- Dac
- Transformer on the output/cabinet/internal cabling/shielding++

The power supply depends a lot on the rest of the setup, but I will give it a go.. I see that Doede clearly prioritizes the quality of the power supply on the Dac over the quality on the reciever/Oscillator, while others have an opposite focus, prioritzing the cleanest possible signal going into the Dac. For my budget I believe the magic power supply is out of the question, but maybe not.. Both @iancanada and @Andrea_Mori have new power solutions that looks really interesting, but I belive they are at different price points.

For source I am considering Allo's USBridge Sinature. And using Ians FifoPi for recklocking. Andrea is in the process of developing an alternative, but I believe this will be more expensive, and outside of my budget.. I will substitute the clocks. And this is one of my main questions. I believe the Accusilicon clocks are good for the money, but I would really like to try Driscoll clocks at 5/6Mhz but this will be quite a lot more expensive, resulting in less money to use on the DAC part.... For power I am considering using Allo's shanti with Ians UC Conditioner, Ians new power supply, or Andreas power supply https://www.diyaudio.com/forums/power-supplies/212476-regulated-power-supply-15.html#post6310502 dependent on price...

The dac part depends on the cost for the rest, but considering 2 or 4 decks DDDac. Not sure about the marginal diffenrence between 2 and four decks in regards to spending the money elsewhere...

I am planning to use Doedes transistors on the output, as it seems they have a great impact on the overall sound. In regards to cabinets, I am planning to have this CNC macined from a block of Alluminum. I really like the simplistic statement of the Alluxity line, so I will try something similar. This also allows for internal shielding beeing part of the cabinet desing. I am leaving the cost of the cabinet out of the equation/budget.

I know there are a lot of questions, but any input and thoughts are greatly appreciated!!
 
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The budget for the build is around US25K.

Whoa, that's A LOT!!! The sky is the limit!!!

I have been wondering about the pre amp part initially. isn't it easier, and possibly better to control this using software instead of an actual pre amp stage?

Not sure what you are referring to here. If you are thinking of going with a "software volume control", that will work ok, but a proper hardware control may be better in terms of audio quality. That said, remember that the DDDAC works best with a transformer output, and using a transformer volume control (TVC) really is a very good way to do what you need:

DDDAC ---> TVC ---> power amplifier

Take a look a the Sowter 9335 transformer, which works great with the DDDAC.
 
Whoa, that's A LOT!!! The sky is the limit!!!

My bad, what I meant was 2.5K... :ashamed:

Not sure what you are referring to here. If you are thinking of going with a "software volume control", that will work ok, but a proper hardware control may be better in terms of audio quality. That said, remember that the DDDAC works best with a transformer output, and using a transformer volume control (TVC) really is a very good way to do what you need:

DDDAC ---> TVC ---> power amplifier

Take a look a the Sowter 9335 transformer, which works great with the DDDAC.

What I meant was that I was considering using for instance Moode for volume control and source selection. Thinking this would be the easiest and best solution, but a TVC might be better, but more costly. Thank you very mych for your comments!
 
I agree with that, I am keeping the cabinet outside my budget. I have a good friend that owns a workshop that works on alluminium, so I only pay for materials. Buying directly from the foundry is quite a lot cheaper than 1K, but finishing will of coarse cost some... A favor for a favor;)
 
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So, finally I concluded this test after many weeks of listening on several music tracks and using a nice selection of different regulators at the LF50 position of the mainboard.

Just to get this straight, what is the function of the LF50 and why could it make a difference?
If you check my circuits, which are published on my website, you can see it in more detail, but basically there are two functions. First, to optionally power the WaveIO isolator (I am not using this anymore btw) and secondly to power the logic and SPDIF section on the Mainboard. I know there are thoughts on “all the logic on the board introducing extra Jitter”. Well it is less influential as you might think. Reason for this is, that the majority of the logic is SPDIF and to reshuffle the data and the R/L clock and not for the bit clock (BCK). This signal sees a very nice path to the dac chip by only moving it through the 74VHCT244 which is a level shifter from 3,3V to 5V logic and a buffer function (which I found out that for parallel use of the PCM1794 this is advantageous) The 244 chip is powered by the LF50 on the mainboard as well. So this position might be influenced by the solidity of the voltage supply. The rest (SPDIF, LR and Data) are not so critical, as with LR and Data, it is just filling the shift registers of the PCM1794A and the final D/A conversion actually takes place on the change of the BCK clock edge. This is the most jitter dependent point in time… I checked this with an engineer from TI by the way, as the datasheet is not very clear on this and some people thought or claimed it is the SCK or L/R signal doing this.

Hi dddac,

the ti support forum seems to state that regarding jitter the most critical signal is SCK:

https://e2e.ti.com/support/audio/f/...earch=e2e-sitesearch&keymatch=pcm1794#3225806
https://e2e.ti.com/support/audio/f/6/t/903744?tisearch=e2e-sitesearch&keymatch=pcm1794
https://e2e.ti.com/support/audio/f/6/t/858806?tisearch=e2e-sitesearch&keymatch=pcm1794



Do you have inputs about BCLK jitter related?

Maybe you already knows, by hacking the raspberry kernel it is possible to turn the BCLK output into input and then having a perfect I2S synchro.
The modification is very simple, one line only but the kernel have to be recompiled.

If any interest I can provide with more details.

Keep up the good work!

Joël
 
:rolleyes: a small typo confused nicely I see.... :(

.........not very clear on this and some people thought or claimed it is the SCK or L/R signal doing this..........


I wanted to write SCK/MCK.

BCK and SCK are not the same in the PCM1794 but is used for the master clock also called MCK (beats me why we have two acronyms?)
So yes, I knew and know it is BCK where the transition is done

In the dddac design the SCK/MCK is not used, only BCK - LRC/FS - Data

what do you mean with: "Do you have inputs about BCLK jitter related?"

The Kernel hack would not help when a FIFO reclocker is used I presume?

Still the idea is good of course. So assuming you run Ropieee, every update will overwrite this, right?
 
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The guy from the TI support forum says the most critical is SCK and not BCK as the TI engineer told you.
I'm confused!
Maybe it's a typo as in your design SCK and BCK are tied together. But maybe not and so, which TI engineer is right?

In my design SCK comes direct from the master clock and BCK from the i2s lines. Same frequency but different sources with no added jitter for SCK. In my understanding SCK rules the converter, BCK fills the input shift register. But maybe I'm wrong?

The kernel hack makes the fifo useless but you are right every update requires a kernel reinstall or recompilation. Not very handy in the long run...

Joël
 
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The guy from the TI support forum says the most critical is SCK and not BCK as the TI engineer told you.
I'm confused!
Maybe it's a typo as in your design SCK and BCK are tied together. But maybe not and so, which TI engineer is right?

In my design SCK comes direct from the master clock and BCK from the i2s lines. Same frequency but different sources with no added jitter for SCK. In my understanding SCK rules the converter, BCK fills the input shift register. But maybe I'm wrong?

The kernel hack makes the fifo useless but you are right every update requires a kernel reinstall or recompilation. Not very handy in the long run...

Joël

This is correct, it's all in data sheet, BCK clocks data into serial data shift register but modulators run off SCK.

TCD
 
OK, I now understand the confusion (I caused myself I realize)

In the DDDAC design, I use the non-digital filter hardware setup for the PCM1794 . The only way to make this work without excessive logic and/or CPU work is to connect the SCK master clock input to the BCK signal. This works fine obviously, given the long year positive feedback on the sound quality of the DDDAC :) With the downside of a bit more noise (see my website for this) but at the upside great "NOS" sound.

So the Delta-Sigma modulator in reality is run (clocked) by the BCK in the DDDAC, hence I see that as most jitter critical - other than the likes of R2R DACs which are doing transition at L/R (see Andrea thread for this)

So it only applies to "my out of the box way" of using the PCM1794....

In typical datasheet applications you are correct and the master clock SCK is the most important clock and not BCK or L/R

I hope I got this cleared up now and did not confuse it even more :eek:
 
OK, I now understand the confusion (I caused myself I realize)

In the DDDAC design, I use the non-digital filter hardware setup for the PCM1794 . The only way to make this work without excessive logic and/or CPU work is to connect the SCK master clock input to the BCK signal. This works fine obviously, given the long year positive feedback on the sound quality of the DDDAC :) With the downside of a bit more noise (see my website for this) but at the upside great "NOS" sound.

This is in the data sheet. For external filter / mono mode, p23 shows that
wordclock is 4 or 8 x normal rate and data *has to be clocked in at sck rate
to fit in the faster wck cycle. Data is split between L and R channels.
The data sheet is a little ambiguous at first.

So the Delta-Sigma modulator in reality is run (clocked) by the BCK in the DDDAC, hence I see that as most jitter critical - other than the likes of R2R DACs which are doing transition at L/R (see Andrea thread for this)

I think modulator still runs of sck as it always did. You just need the faster
wck / bck to clock data in at 4 or 8x normal rate. They are assuming you will
use a normal external 4 or 8 x OS filter.

So it only applies to "my out of the box way" of using the PCM1794....

In typical datasheet applications you are correct and the master clock SCK is the most important clock and not BCK or L/R

I hope I got this cleared up now and did not confuse it even more :eek:

No, in this case sck is still most important. AFAIKS the modulator always
runs off sck. It's worth noting with 1792 you get access to a few more features such as modulator speed.

TCD
 
As said, I use BCK from the I2S to clock SCK, so yes SCK is the most important, hence BCK equally important as they are tied together at the chip.

on all the other replies, check my website, it explains in detail what I did and there is no WCK x4 or x8 and no external filter - so your comments are valid for datasheet designs and not for the DDDAC "out of the box/datasheet" design.