200W MOSFET CFA amp

Ha Ha Ha... so most of you are still chasing the best number instead of the best sound :D It's a critic, think about it, do not blame people with subjective preference, especially when this few people don't think that all good amps sound the same.

Not true, the (my) amplifier is (compared to most modern design) low gain (and exhibits a relative high distortion). The total (open loop) gain is about 30dB, the closed loop gain is about 5dB.
 
Inspiration ....!!

Thank you OS...

Hi Damir
I have followed (and occasionally posted in) this thread since the start.
Nice to see it still continues and the quality of your work is appreciated.
Now I have looked at OS's latest CFA and the differences have made me think more about some of the circuit choices you made.
Some of them may be of little consequence, just has to be done one way or another, others you may have a definite preference.
I am curious to learn your ideas before I do more simulations.

You choose Emitter Followers in the front end rather than a VSSA style where the feedback is split but the EFs can be eliminated for simplicity.
I know OS has tried both ways, you have any comments?

You have cascoded the CE on the Input then an EF assisted VAS.
Another option of similar complexity is a simple CE Input and then have the cascode on the VAS.
Any comments?
Perhaps this influences the choice of same polarity EF assisted VAS compared to OS's "super pair"?
(I see the super pair as basically a complementary EF assisted VAS (with a little extra positive feedback)).

Your feedback network has a phase lead capacitor in parallel with the resistor.
This looks like a VFA network and seemed quite normal to me but now I think about it I realize it is contrary to the usual advice for CFA feedback.
Obviously tried in LTspice and it works well, were there any issues you noticed?

Best wishes
David
 
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Hi Damir
I have followed (and occasionally posted in) this thread since the start.
Nice to see it still continues and the quality of your work is appreciated.
Now I have looked at OS's latest CFA and the differences have made me think more about some of the circuit choices you made.
Some of them may be of little consequence, just has to be done one way or another, others you may have a definite preference.
I am curious to learn your ideas before I do more simulations.

You choose Emitter Followers in the front end rather than a VSSA style where the feedback is split but the EFs can be eliminated for simplicity.
I know OS has tried both ways, you have any comments?

You have cascoded the CE on the Input then an EF assisted VAS.
Another option of similar complexity is a simple CE Input and then have the cascode on the VAS.
Any comments?
Perhaps this influences the choice of same polarity EF assisted VAS compared to OS's "super pair"?
(I see the super pair as basically a complementary EF assisted VAS (with a little extra positive feedback)).

Your feedback network has a phase lead capacitor in parallel with the resistor.
This looks like a VFA network and seemed quite normal to me but now I think about it I realize it is contrary to the usual advice for CFA feedback.
Obviously tried in LTspice and it works well, were there any issues you noticed?

Best wishes
David

Hi David,

We had some discussions about compensation, I am not sure if you remember.
I used in this series of amps my own unique (at least I don’t now anyone used it before me) OITPC compensation. I wrote about it in other thread : https://www.diyaudio.com/forums/solid-state/317335-oitpc-output-inclusive-tpc-tmc.html#post5306081

There no capacitor parallel to FB resistor, no phase lead cap.

My decision to use composition for this series of CFA I explained in this thread, but it get long and not easy to read it again.
OK I tried to explain my choice again but not in details.

1. I don’t want to use VSSA stile CFA, I don’t want big caps in the feedback circuit.

2. My IPS does not use classic diamond configuration but super pairs. In that way I can easily implement coscode, and it’s easy to use low voltage for first input stage.

3. I did many simulations to decide how to implement VAS. Cascoded VAS did show some nice improvement, but not enough to justify need for higher power supply voltage for IPS.
I simulated use of CM active load and got very high open loop gain up to 1kHz but the same at 20kHz if I use simple enhanced (EF) VAS. I liked idea to have very similar distortion throughout whole audio band.

4. I simulated super pair cascoded VAS and showed it in the thread (OS is using now) and I will probably use it for SMD VAS, but with THT VAS with 1381/3503 transistors there is no need for it.

I hope this helps.

Best wishes
Damir
 
We had some discussions about compensation, I am not sure if you remember.

Yes, I remember well, you are one of the people who I read with special attention.
But at the time I had not looked much at CFA, only VFA.
And your compensation looks like VFA compensation so I did not think about this aspect at the time.
Only now do I think that CFA have some differences and I am a bit curious.

There no capacitor parallel to FB resistor, no phase lead cap.

C13 in the schematic in the first post?

1. I don’t want to use VSSA stile CFA, I don’t want big caps in the feedback circuit.

Yes, this a trade-off I have wondered about myself. Just wanted to be sure your reason.

2. My IPS does not use classic diamond configuration but super pairs. In that way I can easily implement coscode, and it’s easy to use low voltage for first input stage.

3. I did many simulations to decide how to implement VAS. Cascoded VAS did show some nice improvement, but not enough to justify need for higher power supply voltage for IPS.
I simulated use of CM active load and got very high open loop gain up to 1kHz but the same at 20kHz if I use simple enhanced (EF) VAS. I liked idea to have very similar distortion throughout whole audio band.

4. I simulated super pair cascoded VAS and showed it in the thread (OS is using now) and I will probably use it for SMD VAS, but with THT VAS with 1381/3503 transistors there is no need for it.

Thank you, very helpful, I will simulate with these observations to guide me.

Best wishes
David
 
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Hi


When there are symmetric compensation caps in a circuit like this or any other symmetric amplifier, should the caps be matched?


In Self's book he suggests that the peromance is the same even if all the compensation is applied to one half of the circuit, which doesn't "feel" right but maybe is true?
 
Hi

When there are symmetric compensation caps in a circuit like this or any other symmetric amplifier, should the caps be matched?

In Self's book he suggests that the peromance is the same even if all the compensation is applied to one half of the circuit, which doesn't "feel" right but maybe is true?

Self is correct.

In an ideal symmetrical design, symmetric nodes are at the same +/- DC potential, so the small signal AC potentials at symmetrical nodes are identical, therefore it doesn't matter where you place the compensation network, if you place it symmetrical or asymmetrical.

However, it could be argued that in the real world, asymmetries exist (p/n devices are never perfectly matched, large signal effects may break the symmetry) so it would make some sense to have separate compensation networks in the two halves. But there is little to no reason to make the two compensation branches identical, to match caps, etc... Circuit asymmetries would require different compensation networks for each branch.

One step further in the practical world, it would be hard to accept a circuit which e.g. it's stability depends on the compensation branches matching the circuit asymmetries. Given that a compensation network should be designed anyway with a healthy safety margin, we can conclude that symmetrical compensation branches are eye candy only. There could be some second order effects, like cancelling some PCB layout effects (hence increasing the CMRR at high frequencies), but usually these can be safely ignored for audio applications.
 
...2. My IPS does not use classic diamond ...but super pairs...

I had only viewed it as an EF level shifter followed by a CE.
To see it as a super pair is a new perspective that makes me think.
I remember that Self has a similar circuit but his explanation did not strike me as clear.
Probably because he doesn't like CFA, as you would know, and he didn't make much effort, either to understand it himself or to explain.
Finally I understand and see that there are some subtleties to explore in LTspice.
More thanks for your help

Best wishes
David
 
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..But there is little to no reason to make the two compensation branches identical, to match caps, etc...

Damir actually showed this back in post #663, after I proposed to eliminate a resistor.
He simulated with the compensation asymmetric and the response was practically identical.

There could be some second order effects, like...PCB layout effects...

I am tempted to try to keep the circuit as symmetric as possible, even if it is overkill, just so I have less worry about unmodelled parasitics in the layout.
Maybe improve EMI resistance a little too, kind of "chicken soup" = it can't hurt.

Best wishes
David
 
Self is correct.

In an ideal symmetrical design, symmetric nodes are at the same +/- DC potential, so the small signal AC potentials at symmetrical nodes are identical, therefore it doesn't matter where you place the compensation network, if you place it symmetrical or asymmetrical.

However, it could be argued that in the real world, asymmetries exist (p/n devices are never perfectly matched, large signal effects may break the symmetry) so it would make some sense to have separate compensation networks in the two halves. But there is little to no reason to make the two compensation branches identical, to match caps, etc... Circuit asymmetries would require different compensation networks for each branch.

One step further in the practical world, it would be hard to accept a circuit which e.g. it's stability depends on the compensation branches matching the circuit asymmetries. Given that a compensation network should be designed anyway with a healthy safety margin, we can conclude that symmetrical compensation branches are eye candy only. There could be some second order effects, like cancelling some PCB layout effects (hence increasing the CMRR at high frequencies), but usually these can be safely ignored for audio applications.

Yes, all that is correct. One of my reasons why to make symmetrical compensation is to, in some way, simplify the pcb layout. For DIY some more components is not big problem.
 
2. My IPS does not use classic diamond configuration but super pairs...

I altered the IPS so that the collectors of the first transistors went to earth - no more "super pair", just EF followed by CE.
It seemed to make no practical difference in the gain.
So I experimented to alter OStripper's amp from EF + CE to 'super pair" - and it was clearly worse, lower gain.
Perhaps I messed up OStripper's but I am definitely surprised at the results.
Maybe I need to start a new thread? I can understand if you are "done" with this circuit, it works well and you have a finalized PCB.

Best wishes
David
 
I altered the IPS so that the collectors of the first transistors went to earth - no more "super pair", just EF followed by CE.
It seemed to make no practical difference in the gain.
So I experimented to alter OStripper's amp from EF + CE to 'super pair" - and it was clearly worse, lower gain.
Perhaps I messed up OStripper's but I am definitely surprised at the results.
Maybe I need to start a new thread? I can understand if you are "done" with this circuit, it works well and you have a finalized PCB.

Best wishes
David

There are other possibility how to connect first IPS transistors collectors.
1. classic diamond, connect collectors to opposite +-15V
2. connect collectors to opposite second transistors emitters
3. connect collectors to the ground, not sure about this, in simulation works
5. live collectors floating, in simulation woks but not sure in real amp.

In all those cases the Loop Gain is similar but distortion increases.
BR Damir
 
There are other possibility how to connect first IPS transistors collectors.
1. classic diamond, connect collectors to opposite +-15V
2. connect collectors to opposite second transistors emitters
3. connect collectors to the ground, not sure about this, in simulation works
5. live collectors floating, in simulation woks but not sure in real amp.

In all those cases the Loop Gain is similar but distortion increases.

I am still surprised by this.
I have seen the classic #1, and #2 is Self's example, #3 was what I tried and #5 had not occurred to me, it should work in real amp, just uses the transistor as a diode.
What I don't yet understand is why your 'super pair" method doesn't increase the gain.
(loop gain will matter most because for a class H amp the OPS distortion will dominate the tiny IPS contribution)
The collector current variation flows into the same node as the feedback network, I expected it to act as extra feedback and it's in the correct sense to increase the gain.
I will have to think some more, this stuff always looks obvious, after it's explained.

Best wishes
David
 
200W CFA and balanced boards are here, now I am waiting for PS regulator boards.
When all boards are here I will send PayPal money request to ones who ordered the boards.
Damir
 

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