Valve DAC from Linear Audio volume 13

Is this a suitable trimmer capacitor for C7?

https://www.mouser.com/ProductDetail/768-JZ150/

The Multicomp mentioned in one of the PDFs is rated at 200V but seems to be unavailable in the US. My concern is that the Multicomp is rated for 200V, and the one I used is only 100V. I've found a higher-voltage replacement if needed.

100 V should be more than enough, so if it fits on the PCB, it is suitable.
 
Seems likely I'm the only one here to go to the trouble to compare Cronus with I2SoverUSB. Can only recommend the latter.

I've tried both, (and others) in various contexts, perceived little (if any, could just be down to a simple inadvertent small change in the volume setting for example) audible difference, and continue to use both.

I'm currently using a BBB/Hermes/Cronus with my DSC2 SDM decoder, a BBB with Pavel's (ppy) isolator/reclocker with my Valve DAC SDM decoder and a JLSounds I2SoverUSB with my Soekris DAM1121 R2R DAC.

Almost forgot, I also have BBB/Acko SO3 isolator/reclocker in my Twisted pear Buffalo 3SE DAC.
 
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Is the software license to use the LX150 expensive? That might be my only option, or building the DSD-only one I have the PCB for...

When it was available ISE 14.7 was about $2995 and up. It isn't supported on Windows 10.
For Windows 10 there is the free ISE14.7 VM for Windows 10. It runs in a virtual machine and it supports all Spartan 6 devices.
 
So the free ISE14.7 VM also supports the LX150? The free Webpack version of ISE14.6 used to support everything up to and including the LX75.

Yes. 14.7 VM covers all Spartan-6 devices and gets 14.7 on to Windows 10. Only downside is that you no longer have the free standalone programming software or Lab Tools as Xilinx used to call them. Vivado still has it though.
 
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Got the Jensen transformers and my input PCBs in today. All that's left is power transformers and the FPGA.
 

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The TE0630 LX150 module should be compatible with the TE0630 LX75 module, but I don't expect the .mcs files to be compatible. (Rfbrw, please correct me if I'm wrong about that, as that would make things simpler.)

That is, you will have to generate your own .mcs file. That involves taking the Verilog files and user constraints file (.ucf), regenerate the filters and FIFOs as described in the README.txt file of version 2.1 and the files FIRandFIFOgeneration.pdf and PlanAheadoptions_10July2016.txt of version 1, run synthesis and implementation and then you will have a new mcs file suitable for the LX150 module.

Appendix A of the TE0630 user manual https://shop.trenz-electronic.de/tr.../TE0630_series/TE0630/documents/UM-TE0630.pdf describes quite clearly how to get the mcs file into the nonvolatile configuration memory of the FPGA module.

By the way, I just saw that the TE0630 LX150 is now out of stock at Trenz, just like the LX75.