Hi I think That IV conversion actually took a place into Rdc of the primary. IF it is not Riv element at the output of the Iout DAC. And with any simple Riv topology Vout is 180deg shifted. So With +data digital input and Riv the Voltage output will be negative. IF you measure simple step response the signal will go first to the negative line of axis...
With RIV part on Iot DAcs AND transformer following, the conversion is like Parallel (RIV II Rdc primary). So Rdc of the primary is taking a part of the Io. As Primary have more ohms as current part is smaller and bigger part is going through the Riv...
Ater that on the secondary is pure Voltage and secondary should be reversed to make the phase correct.
Without Riv, just with transformer, all of the current will going with Rdc primary to ground of the Io...
So OR data should be inverted OR the Voltage output should be inverted to get the proper phase output.
But should be bare in mind that every SE single stage amplifying topogu, tube, JFET to so also shifts phase for 180deg.
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Its fairly easy to show that the DAC output current isn't being converted to voltage at the primary of the transformer. I just made some quick measurements of the voltage there - I see 22mVRMS (on half the trafo primary) with a 400Hz test tone playing.
The Rdc of half the primary is about 30mohm - we'd need 22/30A RMS to get that 22mV which is just over 1A peak. Whereas I only have 108 chips on each side of the primary, giving ~60mA peak.
The Rdc of half the primary is about 30mohm - we'd need 22/30A RMS to get that 22mV which is just over 1A peak. Whereas I only have 108 chips on each side of the primary, giving ~60mA peak.
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Sorry but didn't You said that 1:100 ratio transformer used?
Are the primary and secondary galvanicaly isolated - nor sharing the same ground point?
I'm very happy to report I've at last got my latest 'dream DAC' going and its addictive. The aim with all the paralleled DACs (in the end I needed 288) was to drive my 600-ohm DT880s directly from the DAC via a suitably proportioned SE buffer (i.e. no voltage gain). The target maximum output level was 10VRMS - tomorrow I'll make some measurements to see if I've achieved that, for now its enough just to listen and enjoy.....
FYI, I've recently had a couple folks inquire if any kits are left - yes, I have five left, though two are now claimed. So I effectively have three left.
I'm hoping to have time in a couple weeks to sort these out. So if anyone (who hasn't already contacted me) is interested in a PhiDAC kit, please let me know!
Greetings to @abraxalito and all. Before I found PhiDAC project, I have ordered this https://www.aliexpress.com/item/32881225029.html and should receive in a week or so. I am not a big fan of NOS or a filterless design in particular, but for $42 it should sound at least musical. I can take I2S source from this DAC to drive PhiDAC as well, so this purchase will be not wasted. In future for PhiDAC I will decide whether to get USB to i2S converter or RPi as a source, as I also want to try higher sample rates CM108 chip do not provide. I prefer USB converter, as I mainly use laptop with Foobar and I can resample in Foobar with a quality.
I had a stupid question in mind for a long time. I see it was already answered before, but I need details. While utilising CM108 chip from this board, there is a temptation to use on-board 8x DAC chips as well. I know that stacking more DAC chips with this design is not so simple, but I'd like to try...
Adding 8x chips is changing the current capability and a bias. How to adopt changes and the same time do not mess up with filter parameters, in this example of kitv1? Lets take only numbers of a top channel components:
1. R6 with R50 (31 Ohms total) with R4 (620 Ohms) give a gain, it should be reduced 8x. How it affects filter parameters?
2. Current sink device (Q5, Q8) compensating total bias of the DAC. How much it is changing? R18 to adjust?
3. Current sink device (Q7, Q10) on the output of the first opamp. What is purpose of that?
On unrelated question: How many DAC chips will be in your new parallel kit? If 8 or 16, I would be interested to purchase.
I had a stupid question in mind for a long time. I see it was already answered before, but I need details.
While utilising CM108 chip from this board, there is a temptation to use on-board 8x DAC chips as well. I know that stacking more DAC chips with this design is not so simple, but I'd like to try...Adding 8x chips is changing the current capability and a bias. How to adopt changes and the same time do not mess up with filter parameters, in this example of kitv1? Lets take only numbers of a top channel components:
1. R6 with R50 (31 Ohms total) with R4 (620 Ohms) give a gain, it should be reduced 8x. How it affects filter parameters?
2. Current sink device (Q5, Q8) compensating total bias of the DAC. How much it is changing? R18 to adjust?
3. Current sink device (Q7, Q10) on the output of the first opamp. What is purpose of that?
On unrelated question: How many DAC chips will be in your new parallel kit? If 8 or 16, I would be interested to purchase.
Adapting PhiDAC to work with multiple DACs will be quite tricky. The first AD8017 (whose feedback resistor is R4) can't have lower gain than with 620ohm for R4 as its a CFB amp which will go unstable with R4 much lower in value. So to lose enough gain we'd need to adjust the second AD8017 which has all the filter components around it. That's certainly possible as on the filter stage the feedback resistor's 4k7 so has some flexibility to be reduced for lower gain. It would need fiddling with in LTSpice to work out the new values. My gut feel is its going to need more rather spendy NP0 capacitors than there's room for on the PCB, meaning you'll end up stacking them to reach enough uF.
There is a more thorny issue related to the CLC filter - there's a possibility of exceeding the maximum current of the MLF inductors (5mA) when feeding in the output of eight paralleled DACs (8-10mA). Whilst I doubt there'll be any damage to these inductors, running at current levels above the maximum are going to result in saturation and hence loss of inductance. Meaning the filter's effectiveness won't be guaranteed at all possible signal levels.
The current sink (Q5, Q8) needs to be increased, I'd guess reduce R18 to 110ohm initially, add another paralleled R to tweak the DC level to half the supply. R51 will need reducing too if high PSRR is a desired feature of the CCS, suggest 30k. R14 goes down to 12k.
The current sink devices on both the AD8017s are to keep their output stages from going into classAB. With 8X as much current they also need to be 8X higher current (divide resistor values by 8, similar to the Q5,Q8 pair).
On the new paralleled DAC, I've not decided yet but it will certainly be more than 16. Therefore you can use the board and just populate with as many chips as you want. I've a 36 DAC chip board in manufacture as I write, when that comes back, assuming no errors I'll publish the gerbers.
There is a more thorny issue related to the CLC filter - there's a possibility of exceeding the maximum current of the MLF inductors (5mA) when feeding in the output of eight paralleled DACs (8-10mA). Whilst I doubt there'll be any damage to these inductors, running at current levels above the maximum are going to result in saturation and hence loss of inductance. Meaning the filter's effectiveness won't be guaranteed at all possible signal levels.
The current sink (Q5, Q8) needs to be increased, I'd guess reduce R18 to 110ohm initially, add another paralleled R to tweak the DC level to half the supply. R51 will need reducing too if high PSRR is a desired feature of the CCS, suggest 30k. R14 goes down to 12k.
The current sink devices on both the AD8017s are to keep their output stages from going into classAB. With 8X as much current they also need to be 8X higher current (divide resistor values by 8, similar to the Q5,Q8 pair).
On the new paralleled DAC, I've not decided yet but it will certainly be more than 16. Therefore you can use the board and just populate with as many chips as you want. I've a 36 DAC chip board in manufacture as I write, when that comes back, assuming no errors I'll publish the gerbers.
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PHILDAC REVIEW
Ok, So I have both PhilDAC and PhilDAC SE from Richard. And I already finished both with chassis and spend quite some time with both of them.
My setup are:
PSU: Salas SSLV 1.3 10V ( normal version ) and 13V ( SE version ).
USB 2 I2S: Taobao XMOS module
I did change some resistors in the i2s input area and some in the gain structure of output of the opamp from thick film to thin film. And replace the output resistor in normal version to serial of two F.B. And output capacitors to my fav kind instead of what came in the kit.
The extra caps and a good PSU is what required to get the most from this DAC.
I listened to them with my AKG K812 and through my stereo speakers.
And I have to say that it is quite a very good DAC, it truly different from DACs I have listened before.
It has:
Very clear human voice ( male + female ) which I always desired. It solved the mudding high problem of my AKG 821.
Very nice separation between sound layer. Plenty of bass, feel very real. Instrument feel real too and cross well with the singer voice.
It sounds close to the real live music, not the same but closer than other Dac I heard before. All my friends agreed about that.
No fatigue. I can listen through it for hours.
Make me dig to my old music library and with any old song, it gives me something new.
Quite an addictive DAC. Made me listen to music more than I usually do.
If I have to compare PhilDAC SE + PhilDAC, I prefered the SE version a bit more than normal version, may be 10 / 9. The SE version seem a have firmer bass + mid compare to the normal one.
I already sold / gave all of my DAC kits to my friends and every one seem happy. For the low price, it is a steal
Now I really want to try the better bother of the PhilDAC, could be Ling DAC or the newest, parallel 208 one
Ok, So I have both PhilDAC and PhilDAC SE from Richard. And I already finished both with chassis and spend quite some time with both of them.
My setup are:
PSU: Salas SSLV 1.3 10V ( normal version ) and 13V ( SE version ).
USB 2 I2S: Taobao XMOS module
I did change some resistors in the i2s input area and some in the gain structure of output of the opamp from thick film to thin film. And replace the output resistor in normal version to serial of two F.B. And output capacitors to my fav kind instead of what came in the kit.
The extra caps and a good PSU is what required to get the most from this DAC.
I listened to them with my AKG K812 and through my stereo speakers.
And I have to say that it is quite a very good DAC, it truly different from DACs I have listened before.
It has:
Very clear human voice ( male + female ) which I always desired. It solved the mudding high problem of my AKG 821.
Very nice separation between sound layer. Plenty of bass, feel very real. Instrument feel real too and cross well with the singer voice.
It sounds close to the real live music, not the same but closer than other Dac I heard before. All my friends agreed about that.
No fatigue. I can listen through it for hours.
Make me dig to my old music library and with any old song, it gives me something new.
Quite an addictive DAC. Made me listen to music more than I usually do.
If I have to compare PhilDAC SE + PhilDAC, I prefered the SE version a bit more than normal version, may be 10 / 9. The SE version seem a have firmer bass + mid compare to the normal one.
I already sold / gave all of my DAC kits to my friends and every one seem happy. For the low price, it is a steal
Now I really want to try the better bother of the PhilDAC, could be Ling DAC or the newest, parallel 208 one
Thanks very much for the explanation. This is a solid project with all details well thought. I feel like a fool for not considering that second amplifier would need the same treatment as the first one (Q7&Q10).
All above changes are possible except saturation of LC filter, which I completely missed. For this reason paralleling 8 chip is not practical, so I am giving up. Four chips are rather possible, while still on the border of crossing saturation point.
As for a new parallel DAC, I am concern that failure of a single chip can bring all network down. Probability of a failure is raising proportionally to the number of chips, it is why it may be practical to stop at 16. Beside of fun I want a practical solution. However as you said that I can put less chips if I want and by doing this it won't affect design principles, it is a good news. You can count on me for a one kit. Thank you for your time you spent on the project.
If you were really determined to adapt PhiDAC to multiple DAC chips you could use a transformer to (say) divide the DAC's output current by 8. But really once you're on the slippery slope with transformers you might as well go the whole hog down the rabbit hole and dispense with the opamps too.
Its a very good point and one I've pondered for quite a while. So far I've had zero failures when already running in-circuit, my failures have been right at the start where a chip hasn't worked on first powering up. I've gotten a bit of a handle on one of the failure mechanisms now - solder shorts between the pins of the DAC, from the desoldering process.
Using multiple small boards to build a parallel DAC gives some ability to adapt to DAC faults by swapping out a board. To improve reliability still further it would be fairly easy to run the chips at reduced supply voltage (I run mine very close to the absolute max of 6V) - this will decrease both voltage and thermal stress. On the 36 DAC board at ~6V the chips get quite warm to the touch in the open air - in a case they might reach 60oC. The downside to running at lower voltages is you need more chips to reach the same current level.
Multiple boards is an excellent idea, I will go for it!
As for the voltage I will depend on your expertise. I feel however that a function of temperature vs voltage is not linear. At a certain voltage temperature may start raising much faster. I would not exceed 45degC. Remember also that some of us would like to increase sample rate to allow oversampling, it must be a room for it.
Would you consider to include in the kit USB to I2S converter module linked by @obscurus in a previous post? I think many members would chose this option. This one seems is very good with XMOS XU208 for a low price and I see three Sitime quality oscilators on the board. I would order two boards.
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I shall design the kit version to be more conservative then, no higher than 5.5V power to the DAC chips.
This is a point I'm curious about. I can see that running 2X OS has certain advantages - it allows the anti-imaging filter to be more effective at removing stop-band images. But is there some interest in going up to 4X or 8X? I can't see any advantage of those rates myself and quite likely they're going to reduce the subjective dynamics. On my first prototype 36 DAC board I have used an LED as shunt regulator to the 74HC86 logic driving the DACs, it turns out to need twice as much current at 88k2 than it does at 44k1. So I would need to design for up to 8X as much current if customers wanted to run at 8X OS. I don't think the current requirement for the TDA1387s themselves rises so much with frequency though.
Individual buyers are free to request whatever they need. I'd not include it as standard in a kit though as I wouldn't want to be the one to whom they're returned if any fault develops with them.
matt_garman is kindly going to get me into the game by providing one of his spare PhiDAC kits - thanks again Matt and thanks also to Abraxalito for sharing his adventure with us.
Just wondering if gerbers files are available for the PhiDAC as soldering the board in a reflow oven might be a good proposition. I have a friend with a suitable oven and he's also working on developing his own pick and place machine - populating the board coul be a really useful test use-case for the pick and place if the files are available.
I did have a look for PhiDAC gerbers but didn't spot anything in the search results.
Just wondering if gerbers files are available for the PhiDAC as soldering the board in a reflow oven might be a good proposition. I have a friend with a suitable oven and he's also working on developing his own pick and place machine - populating the board coul be a really useful test use-case for the pick and place if the files are available.
I did have a look for PhiDAC gerbers but didn't spot anything in the search results.