Hi Chris,
I've done again what I previously did for your 2N3904/2N3906 model.
When in Scott's model changing the 4 input buffer transistors for a Generic NPN / PNP, there is practically no change in Ic/Vbe when changing the load.
However, when placing 230K in parallel to these 4 generic transistors simulating Ro, I get exactly the Ic/Vbe values that you found.
Ergo, again Ro can be fully made responsible for the change in Ic/Vbe.
Hans
Interesting
Could you please show simulations of both of your "amplifiers" using 20k sin at normal level and when clipping, and a sim of 20k square at half output level.
I'm not interested in the volum control, but how stable your "Amplifers" are.
I see that you have included a C2 "inside" the Pot. Please do the sim without that C.
All the best
Hans, please advise how you create your generic transistors and maybe post their files if they are not simple to make?
As you have seen, it's an excellent way to find the R and C values of Z(s). In case of the LT1395 resp 125K and 3pF.
To make this test universal, all that had to be done was to insert 2 x 500K resistors from output to the - Input with a 1F cap to earth in between.
Look at the images, and you will immediate notice that for a VFA, in this case a LT1364 all curves are lying on top of each other, but nevertheless, you have your open loop gain available.
For a CFA, you will see different output voltages for different values of Rg, but the open-loop gain is always the same.
From this info you can easily calculate Z(s)
And above all, it's a very easy method to separate a CFA from a VFA.
Hans
Attachments
Here You are.
You have to measure I(V5)/V(b,e) to get the same data that you found.
Ro in this case is {R} and has to be 230K.
When measuring Ic(Q3)/V(b,e), you will find a constant gm value indepenent of R_Load.
But because Ro is inside the transistor, you need to use I(V5).
Hans
Hi Reodor,
That needs a lot of additional info.
What gain are you looking for to be used with these test ?
And what do you mean with 20K sims, are you interested in THD or what.
And what is your definition of clipping, 1% THD ?
The C however in not inside but outside the pot.
And for the square waves, what slew rate is allowed for the input signal.
Hans
Oops, a small error in the VFA image at the right.
The three Rg resistors, (Rg, Rg1 and Rg2) should of course all have the same value as in the left image,
But for a VFA this makes no difference at all, so I won't make a new image.
Hans
Yes, but you don't even need feedback to do that with a CFA.
Very nice. But please recall that my original question related to applying DIT in an open loop situation, which I thought you stated could be done.
This is useful, though; it could be a great test for determining whether we have a CFA or a VFA. It also puts the lie to the claim that "they're really the same circuit doing same thing."
I really do not understand why we need to apply DIT to determine whether a circuit is CFA or VFA.
They are physical configurations that are well defined with specific operating characteristics. We also know that if we raise the loop gain of a CFA, or we apply standard MC, its loop gain morphs into that of a 'classic' VFA. So what - anyone looking for the benefits of a CFA would not do that anyway - in their IC form, and as originally conceived, they were intended for different applications.
They are physical configurations that are well defined with specific operating characteristics. We also know that if we raise the loop gain of a CFA, or we apply standard MC, its loop gain morphs into that of a 'classic' VFA. So what - anyone looking for the benefits of a CFA would not do that anyway - in their IC form, and as originally conceived, they were intended for different applications.
A point often missed, for completeness you tell someone what happens if you use an AD844 at a closed loop gain of 1000, not that there is little point to that.
IC's are general purpose and intended for a broad audience and you need to appeal to all levels of design sophistication and ability.
Sorry I thought it was clear.
Since you are asking:
THD at half output before clipping would be nice. and at 3dB before clipping.
By clipping I mean hard clipping, it should be stable at hard clipping.
About the C you have added:
To have the effect you are using it for the C should be connected from the output to the inverting input of the amp.
What happends if you change the volume by the pot? then it becomes inside the pot if you understand what I'm saying.
By square I mean square.
DIT would be a fine way to determine the type of feedback predominant in a circuit in which a specific IC is connected to a specific feedback network, but it is not a foolproof means of determining topology.
I think Hans might be moving towards recommending the latest test rather than a DIT to to provide a measurement that confirms topology. That might become useful with some of the newer enhanced designs which might not be so obvious as to type. On the other hand, they might, in which case such a test would not be needed.
In what sense? And what does the acronym "MC" stand for?
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Miller compensation.
You can make a VFA with gain-bandwidth independence by returning the Miller compensation capacitor from the VAS collector to the inverting input. Now the unity loop gain frequency is a product/function of the output stage gain (typically unity), Rf and Cmiller. Change the closed loop gain by varying Rg and ensure that the inner (Miller) loop is compensated for the lowest desired gain.
You can make a VFA with gain-bandwidth independence by returning the Miller compensation capacitor from the VAS collector to the inverting input. Now the unity loop gain frequency is a product/function of the output stage gain (typically unity), Rf and Cmiller. Change the closed loop gain by varying Rg and ensure that the inner (Miller) loop is compensated for the lowest desired gain.