Salas DCG3 preamp (line & headphone)

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#2,144
AC primary fuse size and inrush limiting thermistors

Hey everybody,

I was able to get back to my DCG-3 build this weekend but a couple questions came up:

1. Based of diyaudio.com searches I've seen that the formula for AC inlet primary fuse size is power/AC voltage x 3. So for me, with a dual mono DCSTB with 2 x 50VA Antek AS-0518 transformers, I get 50VA/120VAC = 417mA x 3 = 1.25A. That's per transformer so I'll double that to 2.5A for the fuse. Did I get that right? Seems kind of high to me. I tried to get this info from the Antek spec sheet but that didn't really help me or I didn't read it right.

2. On the power amps I've built so far, F5 and VFET, I've used the standard Pass/diyaudio store PSU and followed the schematics with the two inrush CL60 thermistors. I thought I might not need to do that on this preamp but I'm seeing some of your builds are using them. Is that something I need to do or just a nice-to-have? I do have the parts on hand so I can do it if need be.

Thanks,
Dan
 
#2,145
1. That's right because the inrush current during the first half cycle can be many times the rated primary current (especially in toroids)

2. Nice to have, but with such protection you should also cut the AC inlet fuse rating at about half the above
 
#2,148
In circuit all of those would be biased at about 2-2.5mA per section by the tail CCS (BF256 degenerated). Dynamically they will swing very little current about that point (0.025mA pk-pk each for 12V pk-pk output signal). If you look at various types audio JFET curves they tend to converge for transcoductance around low current bias points no matter how higher they can go for IDSS as individual samples. But use #2 & #5 as you say so their Vgs (off) is closer too. Although the current mirror presents very high impedance loading so the pinch off will not differentiate things appreciably. In general I have designed around the uPA in a way to avoid samples waste. Their section to section curve tracing match is great by NEC in all IDSS I have tested by the way.
 
#2,149
To resume 2 & 5 are ok 😉 Testing the circuit at this very moment, everything seems fine😀.
Here the few measurements I did, Supplies +/-17V from bench power supply at the moment, and no load:

Vsupplies +-17V, Isupply +260ma, -250ma
Input pair bias = 5.3ma (0.8V accross R3, both Channels)
Bias: 115ma, on both channels
Vin max: 3.7Vac, for Vout max: 11.5Vac (1kHz)
Gain for Vin=1V, Vout=3.12V at 1Khz = 10.1dB, same on both channel
Vdc out < 1mv after a few sec. (DC offset adjusted without U1 plugin, then inserted U1)
BW (Ref 1V, 1Khz): 3.2Mhz!, but without the input volume pot, and no load...
THD (Ref 1V, 1Khz): 0.006%, or very low...

Waveform is very nice, no instability, time for a listening test...
 
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#2,150
:up: All the above looks well. There is considerable load already, the feedback network driven is much lower impedance than hooking power amps. Is your output stage bias testing very stable too as usual in this circuit? That contributes to low memory distortion. Will sound good enough on a lab bench psu but it will sound better on a dedicated low noise low impedance psu and short wiring.
 
#2,152
When I chose BF256B for tail CCS I knew that there is enough VDS in this circuit for it because its a relatively high pinch off JFET. So I could benefit on its low capacitance high speed VHF & UHF design type. You saw its a very fast circuit. Algar just measured 3.2MHZ stable operation sans input pot and imagine that the bandwidth is harnessed by design for stability already since there is input filtering.

Then I tried best quality current source diodes and various JFET types in its place while blowing hot air over them in full circuit mode and judging their current draw stability. The BF256B when degenerated for the 5mA I wanted was noticeably more immovable closer to its zero tempco range. The CCS diodes are designed to be like that too but the bulkier TO-92 JFET package maybe showed an extra thermal mass advantage.

In conclusion you can use alternative good audio JFETs for 5mA tail CCS with or without degeneration resistor that they can have higher transconductance & lower noise but I don't know if they will be as good for this job in the particular position. But they will not do any immediate harm like upsetting the circuit. You judge by their in circuit current stability and by subjective clues if any.
 
#2,154
Hmm...your reply left me scratching my head.

The schematic I have shows PF5102 JFETs and 33 ohm degeneration resistors.
So is BF256B now the JFET of choice? They cost twice as much as the '5102s, so that's a big disadvantage to me if I have to buy enough in order to match them.

So back to my original question, what is the preferred Idss range if using '5102s?
Is it 6-8mA or 6-10ma or what??

I can use your test jig back on page 46 to get the correct R3 for 4-5mA of current.

I don't have no way to test for stability since I don't own a scope.
 
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