Group buy/Interest list - TDA1541A Core board.

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What could be done ? John's inputs ? : reduce the BCK input voltage from 3v to 0.7 v à la John as the noise is not due to the local decoupling of the three voltage rails but comes from an I2S rail ? Maybe some oscillations due to a smt low value // decoupling at the pins voltage (0.1 uF ceramic ?)

Because if it comes from the dac chip, everybody lives with it from Pedja to Thorsten, or John...

Attenuate BCK may be an option. I had a look at the power supply lines on my CD player, similar noise corresponding with bck.
 
so, I understand, the 1541 is best operated without BCK 😕

@Ryanj : You mention every PS rail to be poluted by bck. Does that also include the pins for the 14 decouple caps?

And how to fix? I guess the use of very low ESR caps might be helpfull...

Not sure about the 14 filter caps, seems to be detectable everywhere. Played around with different local power supply filter caps, doesn't make too much difference.
 
http://www.diyaudio.com/forums/digital-line-level/31780-tda1541-info-3.html#post369849
The digital inputs of the TDA1541(A)

The digital inputs are pnp differential stages, the reference voltage made by two forward biased diodes. this gives a reference voltage of about 1.4V. you can measure this your self by measuring the change in current of the digital inputs as function of input voltage. The input current will be half if the input stage is at ballance.

Reqiured swing for this input stage is 200mVpp around bias, for safety 400mVpp.

The base of a pnp in this bipolar process is juction isolated to the substrate, the input capacitance is therefore mainly to the substrate. Fast and large digital input signals cause capacitive currents in the substrate. Thes can be lowered by making the input signal not larger and not faster than needed.

Thus not larger than 400mVpp around bias.
Not faster than 10 to 30nsec rise time. This rise time is already faster than required is the ft of the pnp is taken in acount. A lateral pnp is in this process not faster than 10MHz, a vertical pnp slightly faster.

You can make these signals with a resitive divider from your digital source to a bias voltage of also two forward biased diodes. Use 1 mA in the diodes. Reduce the speed og the input signal for the TDA1541(A) with a capacitor of say 10pf, to digital ground. Make this circuit separate for each active input.

Do not use transformers or active circuitry, this will cause data dependency of the delay.

Please take notice that pasive delay itself does not cause jitter.

Please take notice that if the input rise time is fast enough, no additional jitter is introduced.

regards,
 
Is this an extract from EC's thread Ryan ? Not sure if you can find it on the internet. The article was published in Hi Fi World. What I do remember clearly was the introduction of 100 ohm resistor on the I2S lines. On the power supply a 1uh inductor was place in series with the
cap which itself to be place as close as possible to the supply pin of the chip. This was done to reduce tank effect on the supply lines.
 
Thanks Ryan for raising this issue of BCK contamination.

That TDA1541 info thread is gold.

More nuggets:

on digital plane grounding theory:

Henk ten Pierick Philips engineer - "it keeps the hf currents out of the chip"


empirical DIY experiment:

"add 3 resistors in the I2S .....for reducing the ground-bounce effect ....... much better sound......the best value of 3 resistors is 1K-3K(!) ........ not 22-100 ohms ...... in the other DACs."

Easy mods?

Please post more great analogue oscilloscope results.
 
Is this an extract from EC's thread Ryan ? Not sure if you can find it on the internet. The article was published in Hi Fi World. What I do remember clearly was the introduction of 100 ohm resistor on the I2S lines. On the power supply a 1uh inductor was place in series with the
cap which itself to be place as close as possible to the supply pin of the chip. This was done to reduce tank effect on the supply lines.

Hi Jaffrie,

This is from the thread tda1541 info

Yeah im pretty keen to have a play with this stuff. I found a basic circuit with values for a starting point. Ill build it and fine tune it after. Should be interesting.
 
Thanks Ryan for raising this issue of BCK contamination.

That TDA1541 info thread is gold.

More nuggets:

on digital plane grounding theory:

Henk ten Pierick Philips engineer - "it keeps the hf currents out of the chip"


empirical DIY experiment:

"add 3 resistors in the I2S .....for reducing the ground-bounce effect ....... much better sound......the best value of 3 resistors is 1K-3K(!) ........ not 22-100 ohms ...... in the other DACs."

Easy mods?

Please post more great analogue oscilloscope results.

Hi kazap,

Its my pleasure to share with you and everyone our common interest! I dont even bother telling the blokes at work... they'd be like "huh?"

But yeah, like i said im pretty keen to have a play and see if i can reduce high frequency energy from entering the 1541.

Ill post my findings for sure. Im loving my Tektronics 2465A - 350Mhz. 😀
 
Hi Ryan
I've been away from diy for more then 10 yrs. Now only having the time to restart all over. Don't know much about today's 24/96 dac stuff but from pass experiments on 16/44.1 dac chips different power supply topologies will always add its own signature to the sound regardless of how super the regulators are. The best sound that I ever got was none regulated dc CLC supply but due to the low voltage tolerance it killed a few dac chips. Lol but when working it was the most organic sound that I've ever experience. Perhaps someone here can work out a stabilised voltage CLC supply & test out my findings.

Cheers
 
Interesting Jaffrie,
This is exactly what Lampizator claims and how he makes his award winning DAC's.
I don't think I would risk my S2 chip, but it would be an interesting experiment with a regular tda1541a. I may one day cobble up something in my old DAC to check your theory. Would it be similar if you put a shunt regulator followed by a bank of caps? I have 2000u of Blackgate N after the Salas shunt. Sounds pretty organic 🙂
 
It wouldn't work. I tried that to be it shunt or linear reg, the minute you connect the inductor the voltage will sag under load. Btw for a CLC to sound good it has to be 3 henries upwards. reason being the inductor itself is used as power storage device. Got this idea when I was mucking around with my tube projects.
.
 
Too much uf is not good either especially on the analog side. Music will sound tight but you
loose the bounce of the rhythm of music. I do use a lot of Bg, of the range I prefer the standard version. I only use bg n for input coupling. It's all personal preference but one thing that is sure is you must mix n match caps. You don't want to be using low esr in all places.

Cheers
 
Hi Jaffrie.

Thanks for your insight, sounds like I need to experiment with some different power supply topologies. The shunt regs will suffice for now. Right now i'm considering making up a little I2S/PCM attenuation PCB to fight off those nasty high frequency currents inside the dac - Im quite surprised that they are still present at the output of my power amp. But more importantly reducing hf noise inside the dac to lower deterministic jitter is priority number one.

Ryan
 
Ryan,

I re read all the thread about "grounding the tda1541" here on Diya and spent a very good moment like at the crazy time we brainstormed to make all together the Distinction1541 one year ago (anniversarry cake please 🙂 )!

I must apologize no to suceed to involve more experienced people which are present on diyaudio, nevertheless still thinking the Distinction is the best ever made diy TDA1541 core board produced for more than one people 🙂

I read more about the ground (and the complex three voltage rails of the 1541) and understand now why my proposals above are sheety !
 
Hi Ryan
Perhaps you should start with a series resistor to the I2S lines first.
Also you might try a 1uh inductor between the salas reg & the input caps.
If there's improvement then change the input cap to say an Elna Silmic

Cheers
I am curious to learn the optimal value for the I2S resistors.

But the use of 22-100 ohms resistors in the I2S lines applied in other DACs, are those values specific for those DACs? Being a bit of a layman on I2S i'd expect some kind of norm for powering and load of those lines. Can somebody please explain?
 
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