Thanks for the reference and link.
I think rational optimisation of the PCB is an obvious next step now that we use Spice to model component capacitances that used to be poorly characterised and understood.
Trace width seems to be a candidate to optimise, rather than let it end up the default in your PCB layout software or production process.
But apart from adequate current capacity I have not seen it discussed.
Anyone know about PCB layout software that calculates capacitance and inductance?
Those >1000MHz clock speed motherboards presumably aren't calculated by hand.
Best wishes
David.
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Well, I'll tell you that at very HF, the current tends towards the edge of the trace. You don't get even distribution.... much like skin effect. So many calc related to HF or high speed don't make sense for LF/audio freqs. This uneven current distribution makes L calc difficult. But the C calculations are fairly accurate... especially for the software which computes Z of traces to minimize reflections on high speed data lines. Are you sure you need this?
THx-RNMarsh
THx-RNMarsh
its nice if your gain is well behaved a ways beyond the ulgif - clearly trace, packaging inductance/board, gate, parasitic device C resonances - what we call local oscillation problems need to be understood and controlled to push higher
spice can be extended with parasitics, lumped transmission line approximations - finding values is the hard part, Johnson and others do give approximation formulas that could help
$ 5-6 figure EDA software does a lot of this modeling - for the hobbyist I don't know of anything remotely as functional
fastHenery, fastCap do give a free sw approach but are pretty limited - more a possible kernel needing lots of I/O, GUI work to be usable
even then limited to where "circuit theory" approximations apply - no EM modeling - just C, inductance, partial mutual inductance (which does model skin and proximity efects in conductors)
spice can be extended with parasitics, lumped transmission line approximations - finding values is the hard part, Johnson and others do give approximation formulas that could help
$ 5-6 figure EDA software does a lot of this modeling - for the hobbyist I don't know of anything remotely as functional
fastHenery, fastCap do give a free sw approach but are pretty limited - more a possible kernel needing lots of I/O, GUI work to be usable
even then limited to where "circuit theory" approximations apply - no EM modeling - just C, inductance, partial mutual inductance (which does model skin and proximity efects in conductors)
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Don't need it. But JCX is correct, as usual, it's nice.
Thanks for the reference.
I don't expect a freeware full EDA suite, but these are a fine step forward.
Best wishes
David
Not to rest on his laurels, Ian is now working on a 'cube law' error cancellation power amp, to appear in a future Linear Audio.
Class A all the way, but 1/4 of the idle dissipation
Jan
And, one Wayne Stegall has been thinking about Distortion Cancellation as well.......
www.waynestegall.com/audio/distcancel.htm
-RNM
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We are dealing with two problems here. One is parasitics, and the other is the control loop.
For the control loop, you have to close at 3 MHz or lower (some would say 3 MHz is too high) whether its bip or mosfets.
For the parasitics, if you follow a few simple guidelines and design compact PCB's, most of these issues are easily solvable through localized decoupling (but remember the ground return path inductance), snubbers and base/gate stoppers.
In the nx and sx amp, I placed the main output device decoupling cap in close proximity, so that the trace inductance as not more than 3-5nH. Without the decoupling, and say 500mm of cabling in the supply, the tops of a square wave output showed ringing - clearly related to the supply rail inductance and parasitic capacitance o the board. The output bip devices use 4.7 Ohm base stoppers (this is a CFA EF2 design).
The e-Amp (VFA EF3) is a big board (about 250mm long IIRC) with 5 devices per rail across about 180mm each side in the OPS and uses the snubber and decoupling networks discussed in Bob's book. During development, I removed and/or reduced some of these components, and was able to trigger the amp into parasitic - with them in situ, no issues and I did a lot of tests.
I dont think detailed analysis of the HF behavior is neccessary to create good, reliable amplifiers - just the application of well tried and tested techniques.
BTW, I always use an output inductor (0.6~1uH) and a Zobel. The nx-Amp loop is closed at 3 MHz (sim) and there are no stability issues -again, lot of testing with all sorts of loads and combos of loads.
For the control loop, you have to close at 3 MHz or lower (some would say 3 MHz is too high) whether its bip or mosfets.
For the parasitics, if you follow a few simple guidelines and design compact PCB's, most of these issues are easily solvable through localized decoupling (but remember the ground return path inductance), snubbers and base/gate stoppers.
In the nx and sx amp, I placed the main output device decoupling cap in close proximity, so that the trace inductance as not more than 3-5nH. Without the decoupling, and say 500mm of cabling in the supply, the tops of a square wave output showed ringing - clearly related to the supply rail inductance and parasitic capacitance o the board. The output bip devices use 4.7 Ohm base stoppers (this is a CFA EF2 design).
The e-Amp (VFA EF3) is a big board (about 250mm long IIRC) with 5 devices per rail across about 180mm each side in the OPS and uses the snubber and decoupling networks discussed in Bob's book. During development, I removed and/or reduced some of these components, and was able to trigger the amp into parasitic - with them in situ, no issues and I did a lot of tests.
I dont think detailed analysis of the HF behavior is neccessary to create good, reliable amplifiers - just the application of well tried and tested techniques.
BTW, I always use an output inductor (0.6~1uH) and a Zobel. The nx-Amp loop is closed at 3 MHz (sim) and there are no stability issues -again, lot of testing with all sorts of loads and combos of loads.
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Hi Bob,
Here is slight criticism of the LT1166 by Marcel van de Vegel :
The LT1166 is basically a class AB control loop (non-linear
common-mode loop used for class AB control). With class AB control loops, you can make very nice non-switching class AB amplifiers that do not suffer from thermal tracking problems immediately after a change in volume (this is always a problem to some extent in conventional class AB amplifiers). The only thing I don't understand is why LT chose to use a product rule. A harmonic mean rule is much nicer, as it keeps the minimum output device current at half the quiescent current, rather than tending to zero when the current through the other device tends to infinity.
Source : http://www.diyaudio.com/forums/solid-state/21329-self-regulating-class-2.html#post249679
That's really my point. If we simulated the secondary effects better there is no reason not to push this up.
What's special about 3 MHz? That's only the point at which currently un-modelled effects start to create problems.
Ovidiu Popa models parasitics in some detail, says he has learnt to do 8 MHz ULGF stably.
Sure. Rules of thumb and lots of tests works.
But a mature production method doesn't need lots of trial and error, it's all understood so well that the products can be optimized analytically and then work as specified.
That's the direction we have advanced. From simple approximations to detailed Spice models that include far more information and permit better optimization.
I see the PCB parasitics as the obvious next step.
Thanks for that. It looks useful.
Best wishes
David
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Bob Cordell:
There are many different ways to use the IRFP240/9240, and I'm not surprized if some of the designs do not sound good; this is true of most devices. I believe that they are capable of superb sound and measured performance at the same time.
Lateral type transistors work even better, and the difference between the vertical type MOSFETs and Lateral release in threshold voltage of 0.5 V and 4 V. Transistors Toshiba occupy an intermediate position 1.55V. I think that's the case first.
From this depends largely on the interaction with the acoustic systems.
resistors MOSFET gates to pick the cleanest and most steep fronts meander signal type
best regards
Petr
There are many different ways to use the IRFP240/9240, and I'm not surprized if some of the designs do not sound good; this is true of most devices. I believe that they are capable of superb sound and measured performance at the same time.
Lateral type transistors work even better, and the difference between the vertical type MOSFETs and Lateral release in threshold voltage of 0.5 V and 4 V. Transistors Toshiba occupy an intermediate position 1.55V. I think that's the case first.
From this depends largely on the interaction with the acoustic systems.
resistors MOSFET gates to pick the cleanest and most steep fronts meander signal type
best regards
Petr
This may actually be a rare opportunity.
It is possible you have increased the effective ULGF more than you intended and this would provide some precious data about frequencies that are beyond what most people try.
You have posted many different variations and possibilities.
Could you post or point to the exact schematic of the amps you have successfully built?
Then we can look at the true ULGF around the OPS and see how it compares.
Best wishes
David
LT1166
/OT
This is a funny remark for several reasons:
1. Why would a 'harmonic mean rule' be much nicer than a 'product rule'?
2. Contrary to what the LT1166 datasheet says, this chip does keep the minimum OP current at about half the quiescent current (see: Comparison of a few techniques).
3. Marcel's version of the auto-bias circuit (see: ‘Audio power with a new loop’, EW, Feb. 1996, pp.140-143),
behaves more or less the same as the LT1166.
Cheers, E.
/OT
This is a funny remark for several reasons:
1. Why would a 'harmonic mean rule' be much nicer than a 'product rule'?
2. Contrary to what the LT1166 datasheet says, this chip does keep the minimum OP current at about half the quiescent current (see: Comparison of a few techniques).
3. Marcel's version of the auto-bias circuit (see: ‘Audio power with a new loop’, EW, Feb. 1996, pp.140-143),
behaves more or less the same as the LT1166.
Cheers, E.
The constant product (geometric mean) operation falls directly out of the translinear relationship. I have used it in ADSL drivers with huge quiescent to output current ratios (250uA/400mA) where the Vbe non-linearity was still not the THD limiting factor. BTW this was for -70dBC at 4MHz.
One overlooked distortion is charging the huge Cje of the output devices. The Vbe changes no matter how you do it are still logarithmic with current and the depth of modulation is still on the order of 100:1.
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Here is zip file with three VFA amps all working in every day use with no problem. ULGF is not so high as with CFA but still out of standard 1 MHz to 1.5 MHz.
Damir
Thanks for that.
I hoped you had used the inaccurate Tian probe and accidentally built an amplifier with extreme ULGF.
But they are all very well done, stable and reasonable.
Never before have I been sad to see such excellent amplifiers
No surprise you are happy with them.
I will have to find someone less careful or build some tests of my own.
Best wishes
David
There are 2 approaches to this.
- Make SPICE world closer to 'real world'
- Make 'real world' closer to SPICE world
The second approach, which IMHO is more productive, involves
- simplifiying the circuit so there are less possible points where parasitics affect things
- PCB layouts, decoupling & earthing that minimize parasitics. This is of course simplified by 1.
For the first approach, we also need to identify the most important stuff that is not simulated.
IMHO, you need to have OPS as close as possible to the VAS; ie no ribbon cables etc especially if you intend advanced comp. like TMC or 'pure Cherry'.
In astx's thread on his 2stageEF high performance class AB power amp / 200W8R / 400W4R I found it was necessary to sim his ribbon cable to get some of the effects he was seeing but not all.
IME, for a 50W 8R amp, you can (and should) have the OPS close to the VAS on the same PCB and not need the evil Ccb on the drivers that Cherry uses. The PCB makes layout etc consistent so even if these are poor, your cures will work reliably.
But IMHO, the biggest unsimmed evil in most PA designs is the length of cable/track from the amp to the big PSU caps. I've simmed this extensively in the last Millenium with my home brewed linear circuit analyzer .. and even more important .. tested & confirmed the findings in 'real life'.
While you can and should get the OPS close to the VAS in practice, its much more difficult to move the PSU within a cm of the power amp.
I identify this as a major failing in #4 of tpc-vs-tmc-vs-pure-cherry
I have not even touched on this in my adventures in SPICE world.
__________________________
Can you tell us briefly what you found and recommend. I confess to sprinkling beads liberally in my LN small signal designs but have just used what I can get. Mea maxima culpa.Bonsai said:
The only caveat I pay attention to is .. not to use the beads where they have 'enough' inductance (including doubly evil mutual) in the signal path to affect THD.
Not sure what your point is here with respect to lateral and vertical MOSFET threshold voltages, but it is notable that the required gate voltage for laterals at high currents can actually be just as high as that of verticals, if not higher.
I have some data on that in chapter 11 of my book.
The Toshiba verticals are my favorite MOSFETs, but I think they are no longer available.
Cheers,
Bob