Exactly.
It is impossible to support IRF240/9240 design by making reference to properties of lateral BUZ devices.
I've been pulling personal stuff and what appear to be fights from other forums being dragged in here for several days. This is highly annoying. Any further personal attacks I pull out of here will result in Bin time. Criticize designs or technical thought, not people- basic rule.
By the time we are waiting for the data, I have implemented the discussed output stage into another amplifier, which I believe can be used for evaluation of the output stage behaviour. First, let's normal operating conditions.
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Supply voltage ± 91V. Sizes of resting currents
Burden 4Ω
Burden 2Ω
Burden 1Ω
Burden 100mΩ
Burden 10mΩ
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Burden 4Ω
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Burden 2Ω
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Burden 1Ω
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Burden 100mΩ
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Burden 10mΩ
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You're right, it's just a demonstration.
When supply voltage is 91V output power:
1) 500W/8Ω. Zener diode must be selected so as to limit current to 12A (2.5 A * 5 or 3A * 4).
2) 1kW/4Ω. Zener diode must be selected as a transistor must be 8 or 10 pairs of 25A (2.5 A * 10 or 3A * 8).
When supply voltage is 91V output power:
1) 500W/8Ω. Zener diode must be selected so as to limit current to 12A (2.5 A * 5 or 3A * 4).
2) 1kW/4Ω. Zener diode must be selected as a transistor must be 8 or 10 pairs of 25A (2.5 A * 10 or 3A * 8).
An externally hosted image should be here but it was not working when we last tested it.
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I wonder if it is possible to make it so and to keep both linearity and protection. I am saying IT IS NOT.
Federmann, you argue here with people like Pavel Dudek (Upupa Epops) who has designed a lot of professional amplifiers that were sold in thousands, and with Ladislav Bunta (BV) who makes a living like an amplifier designer and producer, and again is commercially succesfull.
Contrary to that, you display some strange ideas, that are potentially hazardeous and dangerous for potential less experienced builders. You have no prototype, no sample. I must mention that, though I get a risk to be treated somehow. I hope there are some competent people who MUST see that.
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Overcurrent "protection" is one mistake, showed frequency compensation second.. It will be for sure power oscilator (for short time before explosion), slow output stage and "fast" input and VAS without local compensation closed in global NFB..Unrealistic. We have to wait for measured results.
To explain a bit. 5 years ago I posted a thread
http://www.diyaudio.com/forums/solid-state/40543-new-error-correction-amp.html
This thread described MOSFET output stage with error correction. The output devices were Hitachi 2SK413/2SJ118, similar to IRF range of devices rather than to laterals. The circuit operated pretty good, with one exception - the error correction acted as current limitation as well. It did not enable dVgs of both output MOSFETs above some level. It was fine, until the dVgs limit was reached - then horrible current limitation appeared, with terrible sound effect.
There is a similarity in the design discussed here. dVgs must be let to find appropriate level according to drive and output voltage. It cannot be used as a current 'protection'. It is impossible to achieve this goal without loosing linearity and rated power.
The current protection must be done in a different way. Also, it was proven in this thread, that hexfet MOSFETs cannot be paralleled without source resistors. These are 2 basic technical issues of Federman's design.
http://www.diyaudio.com/forums/solid-state/40543-new-error-correction-amp.html
This thread described MOSFET output stage with error correction. The output devices were Hitachi 2SK413/2SJ118, similar to IRF range of devices rather than to laterals. The circuit operated pretty good, with one exception - the error correction acted as current limitation as well. It did not enable dVgs of both output MOSFETs above some level. It was fine, until the dVgs limit was reached - then horrible current limitation appeared, with terrible sound effect.
There is a similarity in the design discussed here. dVgs must be let to find appropriate level according to drive and output voltage. It cannot be used as a current 'protection'. It is impossible to achieve this goal without loosing linearity and rated power.
The current protection must be done in a different way. Also, it was proven in this thread, that hexfet MOSFETs cannot be paralleled without source resistors. These are 2 basic technical issues of Federman's design.
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