The circuit needs some way to set the dc voltage at the collectors
of the input fets. The input fets are being loaded by the upper
fets acting as current sources, thus very high gain. Therefore
unstable dc operating point and weird DC and AC gain results.
Also you can attach your .asc LTspice file as a text file. This
can let other people play with your circuit.
Tom
dw8083 said:
as I said-I have too much work with comp hardware and software maintenance ,so I just can't find time for sim proggies........probably I just don't need them so badly.....
-so ,I just don't know what's in sim files you posted ; anyway-I can't see nothing wrong with these schematics
hehe-you must count with fact that I'm 4eyes.....
Yes, Tom2 is right, J2 & 4 look up side down... Ussually though those parts don't actually have a direction. They can be flipped and still work... However, it appears there is - current on one side and + on the other of the diff... That would be the first thing to correct...
Also, what's going on with Q1 & 2? Something I don't understand going on there???
of the diff... That would be the first thing to correct...Also, what's going on with Q1 & 2? Something I don't understand going on there???
I want to sincerely thank everyone for their contributions and help! It was invaluable. 
Frankly I could not understand Choky's BC556 based ccs. I kept getting erratic results. It will take a little more study on my part. Even with Tom's, FLG's, and Babo's help.
After fixing the upside down jfets and changing the ccs to a LSK170 part, the preamp started to simulate correctly.
Any final thoughts on the design would be great. Attached is the schematic with simulation results. At the outputs I'm see +-2.8v with an input of +-1v at 1 kHz.
Thank you again!
-David
Frankly I could not understand Choky's BC556 based ccs. I kept getting erratic results. It will take a little more study on my part. Even with Tom's, FLG's, and Babo's help.
After fixing the upside down jfets and changing the ccs to a LSK170 part, the preamp started to simulate correctly.
Any final thoughts on the design would be great. Attached is the schematic with simulation results. At the outputs I'm see +-2.8v with an input of +-1v at 1 kHz.
Thank you again!
-David
Well, if I might make a few suggestions...
You have some current flowing where you don't necessarily want it flowing...
I would first lower V4 to -12-15V...
I would remove R2 & 4 from the J3 & 4 gates and connect them to the outside of your output caps...
Then I would tweak R11 for 10-12 Volts at the drains of J1 & 2...
Just some Ideas
You have some current flowing where you don't necessarily want it flowing...
I would first lower V4 to -12-15V...
I would remove R2 & 4 from the J3 & 4 gates and connect them to the outside of your output caps...
Then I would tweak R11 for 10-12 Volts at the drains of J1 & 2...
Just some Ideas
flg said:Well, if I might make a few suggestions...
You have some current flowing where you don't necessarily want it flowing...
I would first lower V4 to -12-15V...
I would remove R2 & 4 from the J3 & 4 gates and connect them to the outside of your output caps...
Then I would tweak R11 for 10-12 Volts at the drains of J1 & 2...
Just some Ideas
I have no objections on any line
Thank you Zen Mod 
I would like to make a few points dw8083, You may, or may not realize...
And, anyone, feel free to help or contradict my thinking...
First, the Id of your JFETs is important to the linearity. I believe the higher the better, generaly I'm not so familiar with the LSK devices but you would generally want a Bl or a V Toshiba part(Higher Idss). Do you know the Idss of the JFETs your siming with? When your in the "sim machine" You are stuck with whatever your model is set up for unless you modify it. You can check this by making a little test circuit with 10V D-S and the gate tied to the source, and run it. The current you get is Idss if I'm correct In my Pspice I beleive I get something like a Bl-V type part (12.5mA). It is my experience though that thiose parts are harder to get a hold of and I ussually only get 7-10mA Idsss parts in real life 
Another Interesting thing you might want to try... Just set up a basic single ended common source cicruit with the JFET you want to use, with a big Drain resistor and I guess a big load resistor to gnd too. Use a cap to your output node so it's easy to look at the ouput (their perfect in the simulator). About a 15V supply would be good. Start with no source resistor and look at the sine wave output and the fft plot. then start adding some source R and see what happens to the + and - peaks of the sine wave output and the harmonics of the fft plot. You will see the linearity improve with bigger source Rs. You will also notice the gain droping rapidly as your source R is raised.
You have two of these common source circuits in your amp, fed by a current source... Hmmm
I would like to make a few points dw8083, You may, or may not realize...
And, anyone, feel free to help or contradict my thinking...
First, the Id of your JFETs is important to the linearity. I believe the higher the better, generaly
I'm not so familiar with the LSK devices but you would generally want a Bl or a V Toshiba part(Higher Idss). Do you know the Idss of the JFETs your siming with? When your in the "sim machine" You are stuck with whatever your model is set up for unless you modify it. You can check this by making a little test circuit with 10V D-S and the gate tied to the source, and run it. The current you get is Idss if I'm correct In my Pspice I beleive I get something like a Bl-V type part (12.5mA). It is my experience though that thiose parts are harder to get a hold of and I ussually only get 7-10mA Idsss parts in real life Another Interesting thing you might want to try... Just set up a basic single ended common source cicruit with the JFET you want to use, with a big Drain resistor and I guess a big load resistor to gnd too. Use a cap to your output node so it's easy to look at the ouput (their perfect in the simulator). About a 15V supply would be good. Start with no source resistor and look at the sine wave output and the fft plot. then start adding some source R and see what happens to the + and - peaks of the sine wave output and the harmonics of the fft plot. You will see the linearity improve with bigger source Rs. You will also notice the gain droping rapidly as your source R is raised.
You have two of these common source circuits in your amp, fed by a current source... Hmmm
flq-
As I understand it, Idss, is the drain saturation current--below it you are operating in the "triode region" and above it, you are operating in the "pentode region". I'm going to guess and say the pentode region is more "linear", but the triode region offered NP an interesting possibility of building something that might capture the magic of tube SET amps.
Of course, I this is just hugely condensed info from Erno Borbely and NP's ZV8 article.
Here is the link to EB's jfet introduction article:
http://www.borbelyaudio.com/adobe/ae599bor.pdf
He has some great designs, but they use an awful lot of parts......
After everyone bones up on jfets, I can pick your brains--maybe something new for the xa100.
I assume you've seen the ZV8 article--search or I can post the links.
As I understand it, Idss, is the drain saturation current--below it you are operating in the "triode region" and above it, you are operating in the "pentode region". I'm going to guess and say the pentode region is more "linear", but the triode region offered NP an interesting possibility of building something that might capture the magic of tube SET amps.
Of course, I this is just hugely condensed info from Erno Borbely and NP's ZV8 article.
Here is the link to EB's jfet introduction article:
http://www.borbelyaudio.com/adobe/ae599bor.pdf
He has some great designs, but they use an awful lot of parts......
After everyone bones up on jfets, I can pick your brains--maybe something new for the xa100.
I assume you've seen the ZV8 article--search or I can post the links.
I tried something similar to this, looking for a good phase splitter -- but with real parts, no simulator. It was +-15 or +-22 V, 1500ohm resistor on the drain and source side. I recall seeing a phase difference and some other problems on the drain side.....
Maybe I should look into getting a simulator.
Yes, I think I know the Borbely article... there are two of them I believe. That's pretty good stuff. He obviously knows a thing or two. I worked at Moto for several years but I never got a chance to meet him I did work with some pretty sharp cookies in their Linear group that designed op-amps though...
It's just that, if you play around with the sim programs, you can see the reason we do these things and you can prove what these "guru's" are talking about. People like Borbely and N.P. listen and ad the experience of the listening to the equation. There is much more to the "audio performance" of these circuits than the meters and measurements will tell you. Thats why I suggest looking for linearity in the sim first. And, looking for low order harmonics in the sim fft plots. I think the basic concensis is keeping the 2nd harmonic to resonable levels, The 3rd as low as possible and getting rid of the rest. You may still have some THD ect. but if you know where and what it is, you have a good chance of being ready to build something worth listening to. The sim however is very ideal and ignores many facits of reality so you must take the results with the proverbial "grain of salt"
Keeping things very simple like N.P. propagates is a major benifit to riding yourself of the higher order harmonics and the complications of dealing with them. It's not so much that you have a certain low percentage of their total rms level, it's which ones you actually have and in what porpotion...
Regarding the JFET experiments I suggested. I may have not been totally accurate with my suggested setup but, the basic theories I suggested are worth playing with. Especially in regards to the circuits like N.P. and dw8083 are suggesting. I did not cover the gamit of parameters to operate in and such but by varying the few components and conditions you can see alot of good stuff going on in a single stage circuit.
If you think the little BOSOZ circuit is to simple, take a look and sim some of the "UGS Adventures" thread circuits.
Maybe we are expanding this thread to new horizons with all this Bla Bla 
I did work with some pretty sharp cookies in their Linear group that designed op-amps though...It's just that, if you play around with the sim programs, you can see the reason we do these things and you can prove what these "guru's" are talking about. People like Borbely and N.P. listen and ad the experience of the listening to the equation. There is much more to the "audio performance" of these circuits than the meters and measurements will tell you. Thats why I suggest looking for linearity in the sim first. And, looking for low order harmonics in the sim fft plots. I think the basic concensis is keeping the 2nd harmonic to resonable levels, The 3rd as low as possible and getting rid of the rest. You may still have some THD ect. but if you know where and what it is, you have a good chance of being ready to build something worth listening to. The sim however is very ideal and ignores many facits of reality so you must take the results with the proverbial "grain of salt"
Keeping things very simple like N.P. propagates is a major benifit to riding yourself of the higher order harmonics and the complications of dealing with them. It's not so much that you have a certain low percentage of their total rms level, it's which ones you actually have and in what porpotion...
Regarding the JFET experiments I suggested. I may have not been totally accurate with my suggested setup but, the basic theories I suggested are worth playing with. Especially in regards to the circuits like N.P. and dw8083 are suggesting. I did not cover the gamit of parameters to operate in and such but by varying the few components and conditions you can see alot of good stuff going on in a single stage circuit.
If you think the little BOSOZ circuit is to simple, take a look and sim some of the "UGS Adventures" thread circuits.
Maybe we are expanding this thread to new horizons with all this Bla Bla
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