"We should stop asking for more ideas otherwise it will never get finished. Except of course my suggestions, they are very important and worthwhile".
Goes without saying!
"We should stop asking for more ideas otherwise it will never get finished. Except of course my suggestions, they are very important and worthwhile".
Jan
Fair point - but I'm not just speaking for myself and of course I too would love a slew of new plugs and interfaces, yet as an EE all too familiar with feature creep I know this is headed to endless debate about the exact nature of what everyone wants and ultimately requiring substantial PCB, BOM and mechanical changes.
Making just the relevant digital pins available on a pinstrip is a very modest compromise to the digital folks, but if the Gerbers are already at the board house, it's time to just drop it and live with it. If not, adding a few TH pads at the relevant pins could make the unit much more flexible at very little effort and no cost.
The real point on a simple digital input:
1. The Analyser has to sync to the underlying clock of the digital sender HW
2. SPDIF defines as the new master clock
3. This new master clock will have some high jitter and requires some de-jitter if used for the DAC too!
4. The driver must have selection, as an additional feature, as source & master clock from SPDIF (digital input)
Cheers
Hp
SPDIF input would be a liability. Any PC soundcard with a SPDIF input can do the trick much better.
Example : use analyzer to test an ADC with SPDIF output. Analyzer output is sent to ADC under test, we want to record its SPDIF output.
How do you record SPDIF output of ADC?
Option 1) SPDIF input on analyzer : creates headache, because ADC sample rate is slightly different from analyzer sample rate. Will most likely make the analyzer software explode in some unforeseen fashion. Requires rewriting entire XMOS firmware to manage two not-synchronized audio endpoints. Lots of pain, zero benefit.
Option 2) Use SPDIF input on motherboard or PC soundcard. No problem then, use one program for playback and another for record, one using the analyzer and the other using the soundcard. Different sample rates are not a problem, they are entirely decoupled. Analyzer can play at 192k, ADC under test can acquire at 44.1k, no problem. No software to writen, no extra hardware to design, no pain, and it works.
If you are software-challenged, use 2 PCs, one for playback, one for record, who cares. In the end, you get a digital file from the recorded SPDIF and FFT it.
SPDIF (or I2S) output offers a benefit because it allows synchronizing a DAC under test with the analyzer ADC.
SPDIF input does not.
Example : use analyzer to test an ADC with SPDIF output. Analyzer output is sent to ADC under test, we want to record its SPDIF output.
How do you record SPDIF output of ADC?
Option 1) SPDIF input on analyzer : creates headache, because ADC sample rate is slightly different from analyzer sample rate. Will most likely make the analyzer software explode in some unforeseen fashion. Requires rewriting entire XMOS firmware to manage two not-synchronized audio endpoints. Lots of pain, zero benefit.
Option 2) Use SPDIF input on motherboard or PC soundcard. No problem then, use one program for playback and another for record, one using the analyzer and the other using the soundcard. Different sample rates are not a problem, they are entirely decoupled. Analyzer can play at 192k, ADC under test can acquire at 44.1k, no problem. No software to writen, no extra hardware to design, no pain, and it works.
If you are software-challenged, use 2 PCs, one for playback, one for record, who cares. In the end, you get a digital file from the recorded SPDIF and FFT it.
SPDIF (or I2S) output offers a benefit because it allows synchronizing a DAC under test with the analyzer ADC.
SPDIF input does not.
@Jens, since it's your design and project perhaps you can comment on the latest intended schedule when sticking to the current design vs. including some of the various requested digital additions? It's hard to debate on merits when not knowing whether the schedule impact will be in the order of negligible/days/weeks.
I am looking at the possibility of adding an SPDIF output. If implemented now, it will be from the XMOS device directly, reclocked by a flip-flop. It is still TBD if the firmware will be updated now and whether the product specification will be changed to include the SPDIF connector. I hope to know more in a few days.
If everything goes well it will have no real impact on the schedule. But if it creates problems it could be omitted.
An SPDIF input would have a serious impact on the schedule.
If everything goes well it will have no real impact on the schedule. But if it creates problems it could be omitted.
An SPDIF input would have a serious impact on the schedule.
You can omit the flip flop, as a SPDIF output with lots of jitter is actually better for analyzing a DAC.
As a SPDIF source for such purposes, I use a €30 HYUNDAI CD-DVD-MP3 player, it is such a piece of crap the display dims when the drive seeks, you can imagine how bad the power supplies must be inside that piece of wreckage... and it does a VERY good job of sorting out the DACs which reject jitter.... from the ones that don't.
Some DAC's have ultra-low BW PLL's by design (such as the Sabre DAC's when playing with the registers) that will just give up with such a jittery source, but that's not to say it's a bad DAC. Having high jitter on a test instrument by design is advantageous, but then both the jitter class and quantity should be controllable. Deliberately sabotaging the output with a fixed amount of unknown jitter is IMO not the optimal solution.
He will need a buffer and a transformer in any case so a flip flop can handle those tasks quite well and driving the transformer differentially helps reduce radiated noise.
I would expect this to be a separate PCB with the connector and a cable to the main system. I would used a BNC connector (RCA's bring many issues) since you can get a solid mechanical mounting and still be isolated from the panel.
Adding jitter is an interesting exercise but probably irrelevant for anything current. Decent SPDIF receivers today are good for less than 50 pS no matter how lousy the source is (it can have jitter as large as one period and still get flawless recovery).
Supporting AES or TOSlink may be better handled externally. They both (and SPDIF) can become rabbit holes with variations like AES 3 or Dual link or ADAT. Consumer SPDIF will do everything needed for a digital source.
I would expect this to be a separate PCB with the connector and a cable to the main system. I would used a BNC connector (RCA's bring many issues) since you can get a solid mechanical mounting and still be isolated from the panel.
Adding jitter is an interesting exercise but probably irrelevant for anything current. Decent SPDIF receivers today are good for less than 50 pS no matter how lousy the source is (it can have jitter as large as one period and still get flawless recovery).
Supporting AES or TOSlink may be better handled externally. They both (and SPDIF) can become rabbit holes with variations like AES 3 or Dual link or ADAT. Consumer SPDIF will do everything needed for a digital source.
I am trying to get everything sorted to get ready for the production run. There are still a few details that I need to clarify, like some agreements and supply of long lead time components, before we are ready for a group buy.
The prototype build is close to being finalized. I have calibrated a number of them and so far it looks promising. I have also added the possibility of getting an SPDIF output from the XMOS board.
A customized version of the Thesycon driver should be in place early next week.
So far I have used the evaluation version.
The original schedule has definitely slipped, but I am pushing it as much as I can.
The prototype build is close to being finalized. I have calibrated a number of them and so far it looks promising. I have also added the possibility of getting an SPDIF output from the XMOS board.
A customized version of the Thesycon driver should be in place early next week.
So far I have used the evaluation version.
The original schedule has definitely slipped, but I am pushing it as much as I can.
OT posts moved to this thread: http://www.diyaudio.com/forums/analog-line-level/304166-ak4490-dac-headphone-amp-use.html
Let's stay on topic going forward. Thank You.
Ridiculous? I bought a Prism dScope IIIA to hold me over till this project is ready. The price was over $4000 just to get started. Strictly Analog also. I think (As most all do on this thread) that the price is well within reason. Must be why so many signed up for one. Need a reason? Try 5-10 grand to get into a decent piece of test equipment. I'll make you a good deal on my dScope..... All Automated and expensive.... Comes with the computer system too... I think I'll buy 2 of Jens units.....
