IMO, SPDIF (or I2S) output is an extremely important feature, as it allows testing DACs!
Quite easy to do also, as XMOS does it in software for free.
Without this, you can't synchronize the ADC and the DAC, and all the interesting tests are impossible to do.
ASRC don't work for this as they introduce random delay.
Quite easy to do also, as XMOS does it in software for free.
Without this, you can't synchronize the ADC and the DAC, and all the interesting tests are impossible to do.
ASRC don't work for this as they introduce random delay.
REW lists signal values in RMS as opposed to peak voltage. It has an option to let you use 0dbfs as max, though under preferences -> view
awsome results. thx jensH.
agree with peufeu this is really for testing DAC with a synchronous clock between wave out and wave in.
so I d say for me SPDif-out is kind of mandatory on such labequipement.
SPDif in might be useful ofcourse but you will have some work to do on software side in order to synchronize the USB interface with SPDIF clock and offer this as an option in the driver... on my side I m not yet needing it
anyone having an opinion on the previous post about cancelling the fundamental by proper subtract and FIR ?
agree with peufeu this is really for testing DAC with a synchronous clock between wave out and wave in.
so I d say for me SPDif-out is kind of mandatory on such labequipement.
SPDif in might be useful ofcourse but you will have some work to do on software side in order to synchronize the USB interface with SPDIF clock and offer this as an option in the driver... on my side I m not yet needing it
anyone having an opinion on the previous post about cancelling the fundamental by proper subtract and FIR ?
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As exciting as feature creep can be, if additional hardware features are still in the discussion phase I don't foresee production units shipping until Q3 at the earliest.. which would be a pity for those who are waiting in anticipation. Personally I'm holding off buying an AP for my company since this analyzer should be able to do most of what I need and at a fraction of the cost, but the timeline is concerning.
SPDIF output only requires routing 1 XMOS pin to coax/optical output...
I was mentioning it because it would be a very useful feature, yet require extremely small R&D effort.
Yes, I agree with adding an SPDIF signal out in coax. I'm not convinced the optical output would be as useful, only to check if an optical input is operational. The output transformer isolates the ground of the RCA connector. The copper cables are more reliable than the glass optical cables. It might be that Jens is running out of panel space too. That jack could go on the rear panel in that case.
-Chris
-Chris
Maybe it should just be clarified what 'adding' digital means. A single LVCMOS pin, a basic buffered coax S/PDIF output, a properly isolated coax output, or a 110R AES output? The first is very different to the the rest that involve changes to chassis design etc. Besides, some people also need to test ADC's so access to the I2S digital inputs would also be nice, albeit of course limited to the formatting and clocking of the AK5394.
My 2c to not stall development too far but have some functionality available for those wanting it, would be to add the digital I/O's, both I2S and S/PDIF, as plain unbuffered LVCMOS pins or testpoints. No buffers, no transformers, no RCA's. That's how many PC motherboards do it, with having the S/PDIF coax & optical outputs as a separate module.
Being early adopters comes with compromise to have something early and personally I won't mind building my own little interface module since for example I would want AES3/EBU. Something like AP's PSIA would be nice but once again that just opens the can of worms for delay.
My 2c to not stall development too far but have some functionality available for those wanting it, would be to add the digital I/O's, both I2S and S/PDIF, as plain unbuffered LVCMOS pins or testpoints. No buffers, no transformers, no RCA's. That's how many PC motherboards do it, with having the S/PDIF coax & optical outputs as a separate module.
Being early adopters comes with compromise to have something early and personally I won't mind building my own little interface module since for example I would want AES3/EBU. Something like AP's PSIA would be nice but once again that just opens the can of worms for delay.
I'm not handy at designing digital format converters, but if it could be designed by someone who can, I'd be happy to build another adapter box for this myself. I agree that more delay isn't welcome only because I'm excited with this project. However, I am also saving up for it, so a delay isn't all bad from my POV.
-Chris
-Chris
Some people will want optical, etc, everyone will want something different anyway and bitch about the chosen solution, so...
Yes, a pin header (with enough GND pins on it) is optimal.
Bonus brownie points if it has XMOS GPIOs to control slow DACs to set operating points of device under test, etc.
But from your point of view, it's just an unpopulated pin header on the board
A silkscreen reading "FUTURE PROOF" next to it would be nice
I'm thinking the current design is a pretty big step in the right direction and for those of us who really only need the analog capabilities perhaps a later retrofit board adding the digital I/O would keep this thing on track and allow early adopters who also want digital I/O to subsequently upgrade the box.
You can continue to ask Jens to add more and more features and ultimately the device will be stillborn because the hurdles and time to production become too long.
Not sure why if this was such a big deal people didn't suggest these features at the onset.
Edit: And yes I design electronics for a living, hence the attitude.
You can continue to ask Jens to add more and more features and ultimately the device will be stillborn because the hurdles and time to production become too long.
Not sure why if this was such a big deal people didn't suggest these features at the onset.
Edit: And yes I design electronics for a living, hence the attitude.
Hi Kevin,
Anyone who designs any kind of system (like I do) would agree with you. If a rudimentary SPDIF can be added painlessly - great! If not, then may some on PCB access might work. Either that or the first version doesn't get one. I can live with that since I was attracted to the project for it's analogue capabilities. If the digital additions cause a noise penalty ( or worse), then continue as a purely analog measurement device.
-Chris
Anyone who designs any kind of system (like I do) would agree with you. If a rudimentary SPDIF can be added painlessly - great! If not, then may some on PCB access might work. Either that or the first version doesn't get one. I can live with that since I was attracted to the project for it's analogue capabilities. If the digital additions cause a noise penalty ( or worse), then continue as a purely analog measurement device.
-Chris
Consider the Electronic Arts "MASS EFFECT" strategy:
1) Produce AAA game title
2) Sell half of the game for $60
3) Sell the other half of the game content (including a major part of the plot) as a several Downloadable Expansion Packs available on day 1, for the moderate price of $10 each!
So yeah, pin headers for the win!
- Costs nothing, no headache, adds value
- Other people will design expansion hardware for you!
- XMOS has software SPDIF output anyway, and the sources are available, so users can add it themselves...
1) Produce AAA game title
2) Sell half of the game for $60
3) Sell the other half of the game content (including a major part of the plot) as a several Downloadable Expansion Packs available on day 1, for the moderate price of $10 each!
So yeah, pin headers for the win!
- Costs nothing, no headache, adds value
- Other people will design expansion hardware for you!
- XMOS has software SPDIF output anyway, and the sources are available, so users can add it themselves...
I'm actually just referring to some through-hole testpoints in a fly-by connection that most likely are already in anyway for testing purposes. If they can perhaps just be aligned to allow pin-strip connections as opposed to a squid wire affair I'd be golden. Stuff like additional XMOS pins for S/PDIF and GPIO control are of course nice too but that would rely on future software updates which may or may not happen based on demand and of course is Jens's prerogative.