Thank you, but sometimes the implementation of the councils leads to losses. Causes of losses are quite clear.
Thanks guys I think I'm set now. Lots of down time this weekend to enter my stuff into LTSPICE from our in house simulator (that I can't share).
If someone wants to play with the amp from post http://www.diyaudio.com/forums/soli...lls-power-amplifier-book-799.html#post4935057 here is LTspice .asc file and the models file.
Damir
Damir
It's close to the same circuit he posted here he is just killing some more gain in the diff "VAS" and using some feedforward from the front to the buffer.
S
Dear Bob,
happy new year to you and all others too!
Many thanks for providing us the updated schematic and simulation file! Would it be possible for you to post the needed (and maybe updated?) include files too?
Code:
.include Cordell Models.txt
.include LMOSFETs Ks.txt
.include JFET models.txtThe thread is old it will take some hunting, and no there is no feedforward and the Aol >1e6. Remember it was built and scope photos were posted here.
I found this paper on transistor modeling for measuring and extracting the spice parameters.
Can some of the spice gurus here could check it over for suggestibility.
https://www.google.ca/url?sa=t&rct=...VZCWjbKV1wEnoA&bvm=bv.142059868,d.cGc&cad=rja
Can some of the spice gurus here could check it over for suggestibility.
https://www.google.ca/url?sa=t&rct=...VZCWjbKV1wEnoA&bvm=bv.142059868,d.cGc&cad=rja
I didn't know they were write protected. I tried downloading the to disk and it worked for me. I just clicked on the file, clicked on "show in folder", then copied it from the download folder to my destination folder and opened it in that folder.
Let me know if this does not work for you.
Cheers,
Bob
It's okay Bob. I found a way around it.
It's just win10's overly protected system.
Good, so I don't have to repeat myself. If you search the web for an OPA627 schematic there is a similar second stage and I was fooling around with making it fully complementary. I describe what is going on in the first post, all 4 Vas transistors are bootstrapped to the output so the DC errors and the effect of Cob become common mode and do not appear in the signal path. In that example I simply used am IC buffer as an output stage. The resistors are doing the same thing as in Bob's circuit, preventing the voltages from being undefined in the presence of inevitable device offsets. In the picture I think the Aol was about 1e7 with the 2K resistors.
Now to Muntz up Bob's circuit.
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Good, so I don't have to repeat myself. If you search the web for an OPA627 schematic there is a similar second stage and I was fooling around with making it fully complementary. I describe what is going on in the first post, all 4 Vas transistors are bootstrapped to the output so the DC errors and the effect of Cob become common mode and do not appear in the signal path. In that example I simply used am IC buffer as an output stage. The resistors are doing the same thing as in Bob's circuit, preventing the voltages from being undefined in the presence of inevitable device offsets. In the picture I think the Aol was about 1e7 with the 2K resistors.
Now to Muntz up Bob's circuit.
No need to repeat. Just point.
I wonder the same! I've built a few sub circuits that scott had shown and they've worked like magic and that's great learning for me even after spending almost 30 years in telecom electronics!
(thanks Scott!)
(thanks Scott!)
I think it is part of the language barrier. I told him twice that 'model' and 'circuit' are two different things, but he keeps using 'model' for what looks like the complete circuit. Must be the Google translator.
Jan
Jean, thanks for the tip. We, in Russia, called the model as a line with parameters of the transistor, and schematics of the product. I find it hard to break the habit.