Hi,
I tested OPCs circuit structure with an IRF530, 365Ohms Drain-resistor and +40V/-20V well regulated supplies and 50-80mA of idle current.
The PCM1794A in Mono-mode supplies 12.4mA idle centre current and 15.6mApp signal which is more than usual. The Gate of the IRF was very susceptible to HF/RF (better without 220Ohm gate-resistor).
Generating a 1kHz sine 0dBfs signal measured mere -60dBTHD+noise.
Now I don´t think that the over-sensitive Gate spoiled the result so much that it adds up to the 40dB difference between OPC´s and my measurements.
Had simmed the circuit before and got around -80dB THD -which seemed realistic to me, since it is already a good value for non-NFB designs and simmed values had always been better than real values.
The PCM1794A measured with just a small resistor in its output (15-20Ohms) performed exceptionally well with THD at -107dBfs (which is even better than the datasheet value). So I don´t assume the PCM to be the source of the problem but the I/V-circuit, i.e its implementation.
The situation is a bit frustrating and I´m sure others will experience similar probs. The circuit seems to be sensitive to parameter variations.
Maybe OPC just found the golden spot?
jauu
Calvin
I tested OPCs circuit structure with an IRF530, 365Ohms Drain-resistor and +40V/-20V well regulated supplies and 50-80mA of idle current.
The PCM1794A in Mono-mode supplies 12.4mA idle centre current and 15.6mApp signal which is more than usual. The Gate of the IRF was very susceptible to HF/RF (better without 220Ohm gate-resistor).
Generating a 1kHz sine 0dBfs signal measured mere -60dBTHD+noise.
Now I don´t think that the over-sensitive Gate spoiled the result so much that it adds up to the 40dB difference between OPC´s and my measurements.
Had simmed the circuit before and got around -80dB THD -which seemed realistic to me, since it is already a good value for non-NFB designs and simmed values had always been better than real values.
The PCM1794A measured with just a small resistor in its output (15-20Ohms) performed exceptionally well with THD at -107dBfs (which is even better than the datasheet value). So I don´t assume the PCM to be the source of the problem but the I/V-circuit, i.e its implementation.
The situation is a bit frustrating and I´m sure others will experience similar probs. The circuit seems to be sensitive to parameter variations.
Maybe OPC just found the golden spot?
jauu
Calvin
When you say well ragulated supply, how well? I know one of the disadvantages of the D1 is it has practically no PSRR. All applications I have seen use elaborate power supplies.
Hi Calvin,
There are too many differences between the circuit you built and the one I posted to be making any comparisons. If you want to get the measurements I got, you need to build exactly the same circuit, and use exactly the same DAC. It would appear you've changed everything, and you're expecting the same results which is not reasonable. It sounds like you've omitted the gate stopper resistors (which is causing oscillation) and I'm still not clear on what you've done with the source resistor. What's the voltage at the source with the DAC hooked up? Can you post an actual schematic with all the part values?
Here's what I think is happening:
With a 365 ohm drain resistor, and with the PCM1794s higher output current, you'll be getting roughly 4 times the output voltage that the circuit in post #137 provides, or about 8VRMS at 0dBFS. If you look at your simulation, one side of the balanced circuit at a time, you'll see that the lower portion of each wave is rounded over at that output level. When this happens, the net result at the balanced output looks alright, but distortion increases. You can't get that much output with this circuit and still get low distortion.
If we're going to do this correctly, then you need to go back and build EXACTLY what you see in post #137 with 45-50V rails. You're looking at maybe $10 worth of parts from Digikey to get everything on that schematic. Adjust it for 2.5VDC at the source of the mosfet, hook it up to the PCM1794, and give it a test. If you're output is more than 2VRMS at 0dBFS (and it will be) then we might need to drop the resistor values and lower the rails a little bit to dial it in. If you can give me the RMS output at 0dBFS then I can plug it into my simulation and we can bang out a great schematic that will work perfectly with the 1794. This would be very useful for everyone here, and it would solve your problem. When you build a circuit for the first time, you should never take shortcuts.
Regal:
I'm not sure I agree with your PSRR statement for the D1. Any noise from the PSU will appear equally across both branches of the balanced circuit which means they should cancel at the output providing the next stage has decent CMRR. It's part of the advantage of running a balanced system. Using regulators isn't really all that fancy, and it's good practice for circuits that don't draw much current since it's easily implemented and doesn't waste too much power.
I'll try to measure this sometime today, and I'll report back. The problems Calvin has are more related to the circuit he built, and I doubt even the best power supply would change the results.
Cheers,
Owen
There are too many differences between the circuit you built and the one I posted to be making any comparisons. If you want to get the measurements I got, you need to build exactly the same circuit, and use exactly the same DAC. It would appear you've changed everything, and you're expecting the same results which is not reasonable. It sounds like you've omitted the gate stopper resistors (which is causing oscillation) and I'm still not clear on what you've done with the source resistor. What's the voltage at the source with the DAC hooked up? Can you post an actual schematic with all the part values?
Here's what I think is happening:
With a 365 ohm drain resistor, and with the PCM1794s higher output current, you'll be getting roughly 4 times the output voltage that the circuit in post #137 provides, or about 8VRMS at 0dBFS. If you look at your simulation, one side of the balanced circuit at a time, you'll see that the lower portion of each wave is rounded over at that output level. When this happens, the net result at the balanced output looks alright, but distortion increases. You can't get that much output with this circuit and still get low distortion.
If we're going to do this correctly, then you need to go back and build EXACTLY what you see in post #137 with 45-50V rails. You're looking at maybe $10 worth of parts from Digikey to get everything on that schematic. Adjust it for 2.5VDC at the source of the mosfet, hook it up to the PCM1794, and give it a test. If you're output is more than 2VRMS at 0dBFS (and it will be) then we might need to drop the resistor values and lower the rails a little bit to dial it in. If you can give me the RMS output at 0dBFS then I can plug it into my simulation and we can bang out a great schematic that will work perfectly with the 1794. This would be very useful for everyone here, and it would solve your problem. When you build a circuit for the first time, you should never take shortcuts.
Regal:
I'm not sure I agree with your PSRR statement for the D1. Any noise from the PSU will appear equally across both branches of the balanced circuit which means they should cancel at the output providing the next stage has decent CMRR. It's part of the advantage of running a balanced system. Using regulators isn't really all that fancy, and it's good practice for circuits that don't draw much current since it's easily implemented and doesn't waste too much power.
I'll try to measure this sometime today, and I'll report back. The problems Calvin has are more related to the circuit he built, and I doubt even the best power supply would change the results.
Cheers,
Owen
Hi Guys,
I’ve got a quick update with more transconductance values for most of the fets I tested in the previous round.
These measurements were taken at 130mA ID and 25VDS, which matches the way they’ll perform in the D1 with 50V rails and 200/400ohm resistors.
FQA19N20 0.871S
FQA32N20 0.922S
FQA46N15 0.837S
STW75NF20 0.566S
IRFP4310Z 0.795S
IPW50R140 0.669S
IRF1310 0.788S
IRF640 0.548S
IRF740 0.554S
IRF540 0.848S
IRF644 0.581S
IRF510 0.377S
I was curious to see if the higher current and voltage would make some fets stand out more than they had at lower current and voltage, but it turns out that everything just performs better in general, and the two FQA devices are still looking to be the best bet.
If you’re going to build this, then you might as well get a few FQA32N20 parts from Digikey, especially if you consider that they’re only $1.91 if you buy 10 of them. With 50V rails, you’re looking at nearly 1S of transconductance, which will really help to minimize voltage swing at the DAC outputs.
Cheers,
Owen
I’ve got a quick update with more transconductance values for most of the fets I tested in the previous round.
These measurements were taken at 130mA ID and 25VDS, which matches the way they’ll perform in the D1 with 50V rails and 200/400ohm resistors.
FQA19N20 0.871S
FQA32N20 0.922S
FQA46N15 0.837S
STW75NF20 0.566S
IRFP4310Z 0.795S
IPW50R140 0.669S
IRF1310 0.788S
IRF640 0.548S
IRF740 0.554S
IRF540 0.848S
IRF644 0.581S
IRF510 0.377S
I was curious to see if the higher current and voltage would make some fets stand out more than they had at lower current and voltage, but it turns out that everything just performs better in general, and the two FQA devices are still looking to be the best bet.
If you’re going to build this, then you might as well get a few FQA32N20 parts from Digikey, especially if you consider that they’re only $1.91 if you buy 10 of them. With 50V rails, you’re looking at nearly 1S of transconductance, which will really help to minimize voltage swing at the DAC outputs.
Cheers,
Owen
FQA32N20 FTW!!! bought a whole rack of them when I saw it leading 'the charts' number 1 with a bullet 
yes indeed it was very handy that the best part for the job was only 1.91 each. i'll only be running 45v rails for this current PCB though as some of my caps are only 50v. but I guess i'll grab your PCB when they are ready and just move everything over and add a couple parts. should have most everything needed in my parts bin anyway.
I do have to say I was watching from the sidelines waiting for you to mention that Owen, comparing the 2 circuits for performance when there was almost nothing the same
yes indeed it was very handy that the best part for the job was only 1.91 each. i'll only be running 45v rails for this current PCB though as some of my caps are only 50v. but I guess i'll grab your PCB when they are ready and just move everything over and add a couple parts. should have most everything needed in my parts bin anyway.I do have to say I was watching from the sidelines waiting for you to mention that Owen, comparing the 2 circuits for performance when there was almost nothing the same
Hi,
I put the schem and sim-reults in the pdf. As You will notice the schematic differences are mainly the drain- and source-resistances due to the different DAC-currents and supply voltages.
Output voltage 0dBFs is ~2Vrms (single output) and ~4Vrms (differential output) and not 8Vrms (OPC: how did You calculate 8Vrms??)
Input impedance: 1.1Ohms, Output impedance: 365Ohms, Transfer function: ~-364mV/mA. (This gain x times the input current of 7.8mApeak gives 2Vrms, not 8Vrms!)
The gate voltage is set so that there is 0V at the source. The PCM doesn´t like an voltage offset at its outputs, especially not one of 2.5V. There are internal protection diodes that start conducting above ~250mV. Besides, measurements showed that THD is best with lowest voltage swing at the DAC-output (meaning the input impedance of the I/V-converter should not be greater than app. 20Ohms).
The idle current of the MOSFET is 42.4mA, the current through the source resistor 54.8mA (=idle current + DAC-centre current of 12.8mA).
The sim shows THD-values no better than app -80dB at 0dBfs and single output (-107dB in differential mode, because of K2-cancellation). As the THD-tables of the sim show -6dBfs reduces the THD-values by -6db and -12dBfs by -12dB. -12dBfs meaning an output voltage of ~500mVrms in single-mode (THD -95dB) and 1Vrms in differential-mode (THD -130dB).
The linear increase in THD-values with rising output level indicates that the output voltage at fullscale is not too high (driving the circuit into saturation or clipping). Sims also doesn´t show a distorted/flattened sine-wave-peak.
In practise the result using a IRF530 was worse than the sim (~-60dB at 0dBfs, single output), because the gate of the MOSFET reacted very sensitive to RF/HF, which implies, that extra care must be taken when layouting a PCB. Controlling the gate´s behaviour would lead to better THD-figures. So I assume the circuit could come close to the simmed values of -80dB THD at 2Vrms, but even better?? At the moment I doubt it.
jauu
Calvin
ps. one thing I wondered about, is the increase in input impedance towards 500kHz and the resulting increase in input voltage the circuit and the DAC-output see.
I put the schem and sim-reults in the pdf. As You will notice the schematic differences are mainly the drain- and source-resistances due to the different DAC-currents and supply voltages.
Output voltage 0dBFs is ~2Vrms (single output) and ~4Vrms (differential output) and not 8Vrms (OPC: how did You calculate 8Vrms??)
Input impedance: 1.1Ohms, Output impedance: 365Ohms, Transfer function: ~-364mV/mA. (This gain x times the input current of 7.8mApeak gives 2Vrms, not 8Vrms!)
The gate voltage is set so that there is 0V at the source. The PCM doesn´t like an voltage offset at its outputs, especially not one of 2.5V. There are internal protection diodes that start conducting above ~250mV. Besides, measurements showed that THD is best with lowest voltage swing at the DAC-output (meaning the input impedance of the I/V-converter should not be greater than app. 20Ohms).
The idle current of the MOSFET is 42.4mA, the current through the source resistor 54.8mA (=idle current + DAC-centre current of 12.8mA).
The sim shows THD-values no better than app -80dB at 0dBfs and single output (-107dB in differential mode, because of K2-cancellation). As the THD-tables of the sim show -6dBfs reduces the THD-values by -6db and -12dBfs by -12dB. -12dBfs meaning an output voltage of ~500mVrms in single-mode (THD -95dB) and 1Vrms in differential-mode (THD -130dB).
The linear increase in THD-values with rising output level indicates that the output voltage at fullscale is not too high (driving the circuit into saturation or clipping). Sims also doesn´t show a distorted/flattened sine-wave-peak.
In practise the result using a IRF530 was worse than the sim (~-60dB at 0dBfs, single output), because the gate of the MOSFET reacted very sensitive to RF/HF, which implies, that extra care must be taken when layouting a PCB. Controlling the gate´s behaviour would lead to better THD-figures. So I assume the circuit could come close to the simmed values of -80dB THD at 2Vrms, but even better?? At the moment I doubt it.
jauu
Calvin
ps. one thing I wondered about, is the increase in input impedance towards 500kHz and the resulting increase in input voltage the circuit and the DAC-output see.
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Hi
I have replaced gain devices IRF610 from prometheus pcbs with IRF540
I have hoped that I will get much better sound regarding IRF540 higher transconductance
I use It with pcm63
the sound became unealistic, with much more HF harmonics no low bottom
I was not happy at all
after this I increased bias from 10 mA to 25 mA replacing source and drain resistors
again - not any better
I don't have opportunity to do measurements but I think that NP have done his work very well choosing IRF610 and 10 mA bias
Owen you could try to replace source and drain resistors with ccs like http://www.diyaudio.com/forums/pass-labs/34191-i-u-stage-d1-clone-2sk389-finetuned.html
I have replaced gain devices IRF610 from prometheus pcbs with IRF540
I have hoped that I will get much better sound regarding IRF540 higher transconductance
I use It with pcm63
the sound became unealistic, with much more HF harmonics no low bottom
I was not happy at all
after this I increased bias from 10 mA to 25 mA replacing source and drain resistors
again - not any better
I don't have opportunity to do measurements but I think that NP have done his work very well choosing IRF610 and 10 mA bias
Owen you could try to replace source and drain resistors with ccs like http://www.diyaudio.com/forums/pass-labs/34191-i-u-stage-d1-clone-2sk389-finetuned.html
Regal is absolutely correct in asking about the PCM63, and you guys really need to pay attention to some of the basics here.
You can't play the mix'n'match game with whatever you please and then post negative results as though they somehow apply in a blanket sense.
Samoloko:
If you're using a PCM63, then this circuit will not work for you. We've been over this twice before. The output current from the PCM63 is far too low, you won't get sufficient output voltage, and you're best off using the D1 in its original form if that's the DAC you have. You're probably also best off using the IRF610, since, as you said, it's what Nelson chose to use in that exact setup, and it's more than likely the best FET for that setup. In my circuit, with 13 times the current and 1.5 times the voltage, the FQA devices work best. That doesn't mean they'll be any good in the original D1. I'll test the IRF610 in my setup when I get some free time. Pierre has kindly offered to loan me a few of them, and I'll take him up on it when I get the chance.
Calvin:
Thanks for posting all the details, it's much easier to comment when all the information is available.
You've finally clarified that the poor measurement you're getting is the single ended measurement, and not the balanced one, but I'm not sure why you're surprised by that. These DAC's are not meant to be operated in a single-ended fashion the way you're doing it. Notice how there are no single ended performance numbers anywhere in the datasheet? That's because the DAC relies on you to use the differential output properly in order to get good performance. To be honest, I'm shocked you got such good performance using only a single side. I've mentioned before that this circuit is intended ONLY to be used with a balanced output. If you want good SE performance, you need to convert to SE after the differential output of the I/V stage using either a transformer or an op-amp or some other discrete diff to SE converter.
What is the performance of the DAC if you only use one side of the diff output? You'll have to measure that and use it as a starting point. I get the feeling it's not going to be that great. Using a balanced setup doesn't only cancel the 2nd harmonic of the I/V stage, but it cancels the 2nd harmonic of the DAC output. The performance numbers on the datasheet assume you're doing this. If you only use one side, then there's no telling what you'll get.
You are definitely correct about the voltage at the output of the DAC for the 1794. I should have double checked that before posting it. You want 0VDC there. I still think you should halve that resistance value (maybe 200 ohm instead of 365), keep the same rail voltage, and try the circuit like that. You'll double the dissipation and halve the gain, but you'll get better performance at 0dBFS and still get 2VRMS from the differential output. If you can take some measurements with this setup I'd really like to see them. You're already riding the limitations of the DAC, so I'd like to see if things get any better.
Cheers,
Owen
You can't play the mix'n'match game with whatever you please and then post negative results as though they somehow apply in a blanket sense.
Samoloko:
If you're using a PCM63, then this circuit will not work for you. We've been over this twice before. The output current from the PCM63 is far too low, you won't get sufficient output voltage, and you're best off using the D1 in its original form if that's the DAC you have. You're probably also best off using the IRF610, since, as you said, it's what Nelson chose to use in that exact setup, and it's more than likely the best FET for that setup. In my circuit, with 13 times the current and 1.5 times the voltage, the FQA devices work best. That doesn't mean they'll be any good in the original D1. I'll test the IRF610 in my setup when I get some free time. Pierre has kindly offered to loan me a few of them, and I'll take him up on it when I get the chance.
Calvin:
Thanks for posting all the details, it's much easier to comment when all the information is available.
You've finally clarified that the poor measurement you're getting is the single ended measurement, and not the balanced one, but I'm not sure why you're surprised by that. These DAC's are not meant to be operated in a single-ended fashion the way you're doing it. Notice how there are no single ended performance numbers anywhere in the datasheet? That's because the DAC relies on you to use the differential output properly in order to get good performance. To be honest, I'm shocked you got such good performance using only a single side. I've mentioned before that this circuit is intended ONLY to be used with a balanced output. If you want good SE performance, you need to convert to SE after the differential output of the I/V stage using either a transformer or an op-amp or some other discrete diff to SE converter.
What is the performance of the DAC if you only use one side of the diff output? You'll have to measure that and use it as a starting point. I get the feeling it's not going to be that great. Using a balanced setup doesn't only cancel the 2nd harmonic of the I/V stage, but it cancels the 2nd harmonic of the DAC output. The performance numbers on the datasheet assume you're doing this. If you only use one side, then there's no telling what you'll get.
You are definitely correct about the voltage at the output of the DAC for the 1794. I should have double checked that before posting it. You want 0VDC there. I still think you should halve that resistance value (maybe 200 ohm instead of 365), keep the same rail voltage, and try the circuit like that. You'll double the dissipation and halve the gain, but you'll get better performance at 0dBFS and still get 2VRMS from the differential output. If you can take some measurements with this setup I'd really like to see them. You're already riding the limitations of the DAC, so I'd like to see if things get any better.
Cheers,
Owen
Hi,
ahhh, see I missed the point about only balanced measurements. That explains alot ;-) Oh man, just one decent look at Your distortion plots should have made me think in the right direction
Well the PCM1794A doesn´t need to be connected in a balanced fashion.
You can simply hardwire one of the outputs to gnd, or use a small valued resistor to gnd (<20Ohms), or use the same input stage as on the other output. The PCM1794A is very forgiving in this respect. Just make sure the second DAC-output is terminated with a current path to a lowimpedance point.
THD-Values remain nearly the same on a very low level (less than -105dB at 0dBfs), the differences beeing negligible (apart of course of the K2, K4, etc-values) compared to the capabilities of the analog stages.
At the moment I know of just one circuit running without global feedback that uses complementary JFETs and a kind of folded cascode stage, that reaches down to -100dB in singleended connection to the DAC. But I´d prefer a simpler circuit to do the job, because in most cases I like the sonics of those simpe circuits more. I´m afraid though that this is impossible and -80dB represents a limit to such circuits.
jauu
Calvin
ahhh, see I missed the point about only balanced measurements. That explains alot ;-) Oh man, just one decent look at Your distortion plots should have made me think in the right direction
Well the PCM1794A doesn´t need to be connected in a balanced fashion.
You can simply hardwire one of the outputs to gnd, or use a small valued resistor to gnd (<20Ohms), or use the same input stage as on the other output. The PCM1794A is very forgiving in this respect. Just make sure the second DAC-output is terminated with a current path to a lowimpedance point.
THD-Values remain nearly the same on a very low level (less than -105dB at 0dBfs), the differences beeing negligible (apart of course of the K2, K4, etc-values) compared to the capabilities of the analog stages.
At the moment I know of just one circuit running without global feedback that uses complementary JFETs and a kind of folded cascode stage, that reaches down to -100dB in singleended connection to the DAC. But I´d prefer a simpler circuit to do the job, because in most cases I like the sonics of those simpe circuits more. I´m afraid though that this is impossible and -80dB represents a limit to such circuits.
jauu
Calvin
Hi Owen,
Thanks for going to the trouble to make these measurements. They are certainly something to think about. I hope my questions were not seen as being negative towards your project.
I very much doubt ESS's 108dB THD figure was plucked out of the air, so I'd guess there is a configuration that is optimised for V out mode, much like your circuit needs to be optimised for best performance. However as you say there really isn't enough information in the datasheet to go on. At a guess I'd say it's relative to the impedance on the output, but who knows.
Another thing I've been curious about, that isn't covered in the datasheet, is the level of out of band noise coming out of the Sabre. As I'm sure you know, delta sigma chips traditionally put out a lot of ultrasonic junk, and this determines how much low pass filtering is required on the output. If you or anyone else was able to measure this, that would be fantastic. Me, I'm going to have to get a sound card with a good ADC so I can determine this stuff myself. Thanks again.
Dan
Thanks for going to the trouble to make these measurements. They are certainly something to think about. I hope my questions were not seen as being negative towards your project.
I very much doubt ESS's 108dB THD figure was plucked out of the air, so I'd guess there is a configuration that is optimised for V out mode, much like your circuit needs to be optimised for best performance. However as you say there really isn't enough information in the datasheet to go on. At a guess I'd say it's relative to the impedance on the output, but who knows.
Another thing I've been curious about, that isn't covered in the datasheet, is the level of out of band noise coming out of the Sabre. As I'm sure you know, delta sigma chips traditionally put out a lot of ultrasonic junk, and this determines how much low pass filtering is required on the output. If you or anyone else was able to measure this, that would be fantastic. Me, I'm going to have to get a sound card with a good ADC so I can determine this stuff myself. Thanks again.
Dan
Hi Guys,
Just a quick update to say that I've built up one channel of the latest circuit using one of Pierre's PCB's (Thanks Pierre!). It took a few jumpers, but everything fit nicely.
I've got some Ohmite thin film 15 watt resistors for the 400 ohm, and some Caddock 930's for the 200 ohm resistors. Those along with the mosfets are mounted on some oversized heatsinks so I should be able to run pretty much any voltage I want to see where performance stops getting better.
I'm looking forward to doing some serious listening with that setup as well, which should be nice. I'll be comparing just a resistor, an Analog Devices reference board, and then the circuit I've come up with at a few different voltage points.
Calvin:
I don't think you've really hit the wall yet, and you should try a higher voltage to get a little more Vds and Id for that fet. I think you mentioned that you were getting decent performance at less than 0dBFS, so if I were you I'd try a higher voltage.
Spartacus:
Certainly no offense taken from the question, that's what the discussion is all about! I actually did a double take when you mentioned the Vout spec, since I had never even considered it.
As you mentioned, I'm sure ESS came across that number somehow, but it wasn't with a resistor. It's either a specific circuit, or maybe even a "theoretical capability" spec. It would also be interesting to see some actual measurements of the best people have done with op-amps. I remember some discussion on the first Buffalo thread about people not being able to get full performance, but I don't remember how close people got.
Samoloko:
Again, no offense taken, and you're right, you did specify how you were listening to it, which is the important part. All I was trying to say was that what applies to one circuit doesn't necessarily apply to others.
Cheers,
Owen
Just a quick update to say that I've built up one channel of the latest circuit using one of Pierre's PCB's (Thanks Pierre!). It took a few jumpers, but everything fit nicely.
I've got some Ohmite thin film 15 watt resistors for the 400 ohm, and some Caddock 930's for the 200 ohm resistors. Those along with the mosfets are mounted on some oversized heatsinks so I should be able to run pretty much any voltage I want to see where performance stops getting better.
I'm looking forward to doing some serious listening with that setup as well, which should be nice. I'll be comparing just a resistor, an Analog Devices reference board, and then the circuit I've come up with at a few different voltage points.
Calvin:
I don't think you've really hit the wall yet, and you should try a higher voltage to get a little more Vds and Id for that fet. I think you mentioned that you were getting decent performance at less than 0dBFS, so if I were you I'd try a higher voltage.
Spartacus:
Certainly no offense taken from the question, that's what the discussion is all about! I actually did a double take when you mentioned the Vout spec, since I had never even considered it.
As you mentioned, I'm sure ESS came across that number somehow, but it wasn't with a resistor. It's either a specific circuit, or maybe even a "theoretical capability" spec. It would also be interesting to see some actual measurements of the best people have done with op-amps. I remember some discussion on the first Buffalo thread about people not being able to get full performance, but I don't remember how close people got.
Samoloko:
Again, no offense taken, and you're right, you did specify how you were listening to it, which is the important part. All I was trying to say was that what applies to one circuit doesn't necessarily apply to others.
Cheers,
Owen
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Hi,
Owen, how did You measure the distortion values of the ESS-chip?
Just -80dB@0dBfs would mean a ridicolously high value even for a 24Bit-DAC, let alone a DAC that rather claimes to be a new miracle.
Did You take the measurement of the pure DAC or with the MOSFET-I/V connected to the outputand how did You generate the input signal?
jauu
Calvin
Owen, how did You measure the distortion values of the ESS-chip?
Just -80dB@0dBfs would mean a ridicolously high value even for a 24Bit-DAC, let alone a DAC that rather claimes to be a new miracle.
Did You take the measurement of the pure DAC or with the MOSFET-I/V connected to the outputand how did You generate the input signal?
jauu
Calvin
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