diyAudio

diyAudio (https://www.diyaudio.com/forums/index.php)
-   Solid State (https://www.diyaudio.com/forums/solid-state/)
-   -   Stability of an amplifier under capacitive loading (https://www.diyaudio.com/forums/solid-state/359704-stability-amplifier-capacitive-loading.html)

H713 9th September 2020 10:46 AM

Quote:

Originally Posted by Bonsai (https://www.diyaudio.com/forums/solid-state/359704-stability-amplifier-capacitive-loading-post6331664.html#post6331664)

The cure in almost all cases is to place a small inductor in series with the amplifier output (‘output coupling inductor’). Using modern high fT devices, anything more than 0.6 uH almost always does the trick.

Output Coupling Inductors


I've seen a few amps that just do 1 or 2 turns on a small ferrite core between the output of the power amp module and the speaker jacks. To me that seems like it opens a can of worms with the linearity of ferromagnetic materials, but perhaps I'm mistaken.

Out of curiosity, you mention that with output devices with a high transition frequency that a relatively small output inductor is enough. Can anyone explain why that is?

Bonsai 9th September 2020 07:08 PM

Please see the link I posted a few pages back.

Its never a good idea to use ferrites for the output inductor because the currents are very high and you run the risk of saturation and that can lead to instability issues (the inductance falls to zero when the ferrite saturates) and non-linearity.

A 0.6-0.8 uH air-core inductor is c. 10 turns on a 1cm former and you shunt that with a 2.2 Ohm resistor and it does the job for most modern amps assuming they are correctly compensated in the first place.

Bonsai 9th September 2020 07:12 PM

Quote:

Originally Posted by knutn (https://www.diyaudio.com/forums/solid-state/359704-stability-amplifier-capacitive-loading-post6335545.html#post6335545)
I still don't agree. My point is: With a higher capacitive loading, the loop gain drops, so the phase margin is not worsened.

This can be seen clearly if you apply a square wave to the input of the amplifier and look at the amplifier response.

The loop gain drops at HF and the phase margin degrades without the output L(R) network. Again, please see the link to the presentation I posted a few pages back that makes this mechanism clear. This is straight control theory stuff - you can see the upper pole migrate down in frequency and up in magnitude as you increase the capacitive load. As soon as the pole is above 0 dB you have a problem because the roll off slope is now intercepting the 0 dB gain line at 40 dB/decade. The output L(R) network solves that problem.

spladski 9th September 2020 10:39 PM

Quote:

Originally Posted by knutn (https://www.diyaudio.com/forums/solid-state/359704-stability-amplifier-capacitive-loading-post6335545.html#post6335545)
I still don't agree. My point is: With a higher capacitive loading, the loop gain drops, so the phase margin is not worsened.

This can be seen clearly if you apply a square wave to the input of the amplifier and look at the amplifier response.

Are we talking about the same design? The OP mentions oscillations in his sim. As there is no LTspice version I cannot confirm.

knutn 10th September 2020 09:49 AM

Common emitter output stage
 
1 Attachment(s)
I'll try to explain why I think it is better with a common emitter output stage.
Referring to the schematic with a darlington output following the VAS, we are ensuring the stability by selecting a proper value of C_Dom. The Miller-effect make it possible to use a relative small value of this capacitor. We could, however, use a capacitor C_Comp instead (or in addition). However, then the capacitor had to be much larger (Slew rate becomes a problem).
Now, what happens if we remove the Darlington output stage and use the VAS as the output stage instead. The capacitive loading C_L now is at the collector at the VAS. (We have now removed the possibility that the darlington is oscillating because of the loading capacitor C_L.)
So if you mean that a commom emitter stage is not better than a emitter follower output stage, then you have to explain to me why a larger C_Dom causes more instability.

spladski 10th September 2020 12:11 PM

The overall topology is the embodiment of the design objective. Separating elements without reference to the design objective is meaningless.

Bonsai 10th September 2020 03:52 PM

1 Attachment(s)
With all due respect knutn, your post does not make sense.

Certainly EF or SF are better than common collector or common drain, but the fundamental mechanism is as described below no matter what the OPS.

knutn 10th September 2020 04:58 PM

You have missed my point: If you load the VAS collector with a higher capacitor, the open loop breakpoint is reduced. Your figure assumes no change in the open loop bandwidth.

Bonsai 10th September 2020 05:22 PM

You can do that with a resistor. And either way it’s entirely suboptimal.

In any amp, you have to ensure the loop gain intercepts the unity loop gain frequency at 20dB/ decade to ensure unconditional stability. The problem with C loads is they move the upper pole around so you cannot guarantee the unconditional stability requirement unless you really hobble the loop gain by doing what you suggest.

bansuri 13th September 2020 05:53 AM

Quote:

Originally Posted by rayma (https://www.diyaudio.com/forums/solid-state/359704-stability-amplifier-capacitive-loading-post6330803.html#post6330803)

nice notes, but they refer only to opamps not power amplifiers


All times are GMT. The time now is 09:34 AM.


Search Engine Optimisation provided by DragonByte SEO (Pro) - vBulletin Mods & Addons Copyright © 2021 DragonByte Technologies Ltd.
Resources saved on this page: MySQL 17.65%
vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2021 DragonByte Technologies Ltd.
Copyright ©1999-2021 diyAudio

Wiki