Hi everyone,
gonna make changes with D AMP output stage but need some information about antiparralel free wheeling diode...
Gonna put schottky common cathode in serie with mosfet drain (diode is STPS3045CW) in order to prevent current from flowing through the fet body diode (too slow) and force it to go through the outside diode (antiparrallel).
I'm wondering which recovery time I should use (depends on deadtime i guess) trr=40ns is good ? or do i need less (25-28 ns) ?
With 24ns deadtime (RCD circuit before IR 2113 Low and high inputs R=47ohms C=470pF) when I try to increase output signal to reach saturation output stage burns before saturation...
Should i lower dead time as output stage didn't burn with low deadtimes ?
I guess body diode remains reverse conductive as the other fet is turned on...
someone got an idea ?
gonna make changes with D AMP output stage but need some information about antiparralel free wheeling diode...
Gonna put schottky common cathode in serie with mosfet drain (diode is STPS3045CW) in order to prevent current from flowing through the fet body diode (too slow) and force it to go through the outside diode (antiparrallel).
I'm wondering which recovery time I should use (depends on deadtime i guess) trr=40ns is good ? or do i need less (25-28 ns) ?
With 24ns deadtime (RCD circuit before IR 2113 Low and high inputs R=47ohms C=470pF) when I try to increase output signal to reach saturation output stage burns before saturation...
Should i lower dead time as output stage didn't burn with low deadtimes ?
I guess body diode remains reverse conductive as the other fet is turned on...
someone got an idea ?
Hi Bender, i guess you got pretty good switching, though dead time isn't 15nS yet. Your circuit have about 14db loop gain, i.e. THD reduced just by factor 5 vs open loop, for instance Hypex's UcD loop gain is about 30db or factor 30, so 1/6 of the your THD figures seems very close to UcD400 performance, hence precision of the switching very close for both too. If not so much big idle consumption, then try to short the gate's diodes etc, BTW, PSRR is pretty poor, due to low loop gain, it's could be improved (with the same loop gain) by H-bridge or in the UcD manner (res from VCC and res from VDD to the inverting comparator input). After all you can change the feedback loop, and get a lot of loop gain with WOW THD figures. (hint: ask Charles) 
Low gain reduce distortion, that's why I put it so low in my design. PSRR still very good due to this low gain. You can improve lot more THD figure if you reduce amplitude of triangle wave, but check for stabilty when you go with load and without load. Lower the amplitude of triangle wave (open loop gain), better performance you will get, but more subject to instability.
Fredos
PS higer voltage=more stability!
Soft clipping can be attained by matching gain of first stage (TL072) to lower gain of power section....
Fredos
PS higer voltage=more stability!
Soft clipping can be attained by matching gain of first stage (TL072) to lower gain of power section....
Hi Charles, i run amp with 2Ohm, 4Ohm acoustic and 6.5 Ohm resistive load. It works stable, problems appear without zobbel, also i've got trouble, when try to reduce trianlge amplitude close to 0.1-0.3 V (in my proto triangle =0.5V).
Hi Ivan, nice to see you. Yea, DT=35ns, idle consumption ~4.5W.
Reducing DT from 45nS to 25nS provide THD reduction in 1.5 times and increase idle consumption from 4.5W to 5.5-6W. Main intend of amp is subw application, that's why i stopped at 35nS DT.
Next device will be H bridge with 100kHz carrier.
But it really interest to get lower THD and PSRR, i hope Charles help me with FB.
Hi Fredos, you are right about triangle amplitude, schematics become instable. PHP28NQ15 DS voltage limits power supply voltage.
Hi Ivan, nice to see you. Yea, DT=35ns, idle consumption ~4.5W.
Reducing DT from 45nS to 25nS provide THD reduction in 1.5 times and increase idle consumption from 4.5W to 5.5-6W. Main intend of amp is subw application, that's why i stopped at 35nS DT.
Next device will be H bridge with 100kHz carrier.
But it really interest to get lower THD and PSRR, i hope Charles help me with FB
.Hi Fredos, you are right about triangle amplitude, schematics become instable. PHP28NQ15 DS voltage limits power supply voltage.
Bender, THD of the such carrier based amps, very depends from the propagation delay (but selfoscillating amps completely other story), so faster comparator in your case must be preferable. If you need only subwoofer amp, 100khz will quite enough, however output impedance rather too high for sub_amp (damping factor 20@2ohm= just a shame), and bass will noticeable boominess. Did you measure the output impedance?
.
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.