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Class D Switching Power Amplifiers and Power D/A conversion

New half bridge driver IC with GND!! referenced input
New half bridge driver IC with GND!! referenced input
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Old 3rd August 2006, 05:49 PM   #31
analogspiceman is offline analogspiceman  United States
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I still haven't received a reply from IR to my data sheet questions, but here is the zipped first-cut model of the IRS20954 driver IC.

These are LTspice-only files consisting of the hierarchical symbol, schematic and top level test schematic.

Regards -- analogspiceman
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File Type: zip irs20954.zip (5.2 KB, 596 views)
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Old 4th August 2006, 03:05 AM   #32
powerbecker is offline powerbecker  Germany
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These are LTspice-only files consisting of the hierarchical symbol, schematic and top level test schematic.

Regards -- analogspiceman

Thank You very much!
I still not get the time for a closer look to the specs and You present a model - great!
Regards
Heinz!
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Old 4th August 2006, 07:50 AM   #33
analogspiceman is offline analogspiceman  United States
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Okay, attached is a self oscillating style, class d example design showing the IRS20954 model in action.  It is set up with a slightly low-ish operating frequency to speed run time.  It goes through a soft start cycle, then idles a bit, then reproduces an increasing amplitude sine wave that eventually trips the current limit.

The .asc (LTspice schematic) extension is not an allowed file type for attachments posted to this forum, so the extension has been changed to ".txt" (you'll have to change it back after downloading).  Be sure to put this new file (Class-D1.asc) in the same folder with the model files from the prior zip file.

Regards -- analogspiceman

PS: please report any model bugs that crop up, thx.
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File Type: txt class-d1.txt (7.1 KB, 281 views)
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Old 4th August 2006, 08:18 AM   #34
classd4sure is offline classd4sure  Canada
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Csh is the OC is it?


I had no problems with it at all it ran just fine and did as expected...... awesome!

It seems to switch low again at about 96.6ms and then unless I miss my guess here freewheel current trips the overcurrent again?
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Old 4th August 2006, 08:54 PM   #35
analogspiceman is offline analogspiceman  United States
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Quote:
Originally posted by classd4sure
Csh is the OC is it?

I had no problems with it at all it ran just fine and did as expected...... awesome!

It seems to switch low again at about 96.6ms and then unless I miss my guess here freewheel current trips the overcurrent again?
Yes, it trips, resets, waits and trips again on the next input voltage peak - just look at the ramping voltage on the timing capacitor (C2) on the CSD pin.

For overcurrent protection, the IC somewhat crudely senses the on-voltage across each MOSFET.  MOSFET on-resistance is a strong function of temperature (it goes up), so, so is overcurrent trip level (which, therefore, goes down).  Trip currents (really voltages) for the two MOSFETs are set independently and normally would be designed, as much as possible, to be at the same setting.  Obviously, the point of this IC's circuitry is to protect against gross load shorts on the amplifier output rather than provide laboratory grade current limiting.  This method probably also offers quite a bit of protection against thermal overloads due to insufficient heat sinking.  By the way, that reminds me - one caveat about amplifier simulations - LTspice MOSFET models do not provide dynamic thermal modulation of on-resistance.  There are some complicated sub-circuit type MOSFET models that do, but they generally run so slowly as to be next to useless.  Hmmm...

I'm surprised that no one has yet commented on the deadtime setting for this circuit.  It's too short!  Those few tens of nanoseconds do matter.  Just look at the spikes in the MOSFET drain current, swap the values of R5 and R6 (adds 30ns to deadtime), then rerun and look again - no more spikes.

Regards -- analogspiceman
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Old 5th August 2006, 02:32 AM   #36
classd4sure is offline classd4sure  Canada
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Hi,

I noticed the cross conduction when I looked at the gate waveforms last night. It wasnt' worth mentioning at all as it was obvious at the time this was a proof of concept sim for your gate driver model, and that worked flawlessly from what I saw. Commenting on the rest of it would only have been arrogant, and you know what you're doing.

I guess one option is always to shut down the amp entirely upon overcurrent, or enforce a longer delay before it retriggers, this could allow at least a general inspection for shorts and also allow more time to cool things down. Depends how bullet proof this ends up being.

I noticed a few mosfet models as you mentioned from fairchild, hardly worth the effort required to try them at this point.

It would be nice if you got a reply to your querries in order to perfect the model, but they possibly don't want to offer that kind of "support", and anyway, it's still just spice, maybe this is just perfect enough.

Thanks for doing it for us.
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Old 5th August 2006, 06:03 AM   #37
powerbecker is offline powerbecker  Germany
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I'm surprised that no one has yet commented on the deadtime setting for this circuit. It's too short! Those few tens of nanoseconds do matter. Just look at the spikes in the MOSFET drain current, swap the values of R5 and R6 (adds 30ns to deadtime), then rerun and look again - no more spikes.

Regards -- analogspiceman

analogspiceman,
thank You for the example, so far I see the model works fine!

If one reduce the Gate-Rs to 2E the current spikes seems
acceptable with short deadtime also the distorsion is quite low. But with 45ns it donīt looks good.
For test I used your older example.
Regards
Heinz!
Attached Files
File Type: txt class-d1-deadtime_comp.asc.txt (9.1 KB, 170 views)
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Old 6th August 2006, 10:08 AM   #38
ChocoHolic is offline ChocoHolic  Germany
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....received the samples within 4 days!!! I love the modern world.

I am starting to play around with a halfbridge set up like the attached schematic. I disabled the high side over current protection, because my final amp will have a full bridge, means two over current protections in the lower legs will give full protection.
Don't wonder about the BYT86 for the boot strap, I just had it on hand...
In first step I selected the max dead time and set the OCSET to a small value (74mV).
Well... I thought this would be OK to start playing around and adjusting the gate drive (kept simple for first step, asymetric ON/OFF speed next..).
But for some reason the IC does not generate any output signal at all, even when driving the input signal into heavy clamping.
In general all signals/voltages are looking OK for me, except the gate drive signals which are constantly low. Consequently the halfbridge output is drifting with high impedance. The voltages/operating points in the schematic are taken with +/-16V rails. I guess, I am a victim of some shut down mechanism, which I am not aware off... RTFM once more...
Hints are welcome.
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File Type: pdf halfbridge1.pdf (22.1 KB, 389 views)
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Old 6th August 2006, 10:12 AM   #39
ChocoHolic is offline ChocoHolic  Germany
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**** ?!!!
I just wanted to say Read The Fine Manual !
Not allowed???
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Old 6th August 2006, 01:05 PM   #40
ChocoHolic is offline ChocoHolic  Germany
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...the data sheet pushed me to change the voltage divider for OCSET.
IR proposes the range between 0.5V .... 5V.
My new divider is 8k2 and 1k2. Nope. This was not the reason.
Now I have 653mV at the OCSET pin, but still nothing is moving.
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