You might want to think about the 3 stage output driver, you can get some pretty good discrete transistors, like the Zetex high current high hfe parts, in the real world of discrete you don't need to worry about that their dies probably are bigger than your usual total integrated opamp die size budget 
I would still say that my single stage output driver gives great results, but try with a two stages with final stage Zetex parts and see what happens....
And maybe the LED bias I use, it's nice with a little red glow, all those fets need matching/selection in the real world.
Then you might get close to something that can fit 10x10mm....
http://www.diyaudio.com/forums/solid-state/156674-my-take-buildable-discrete-op-amp.html
Søren
I would still say that my single stage output driver gives great results, but try with a two stages with final stage Zetex parts and see what happens....
And maybe the LED bias I use, it's nice with a little red glow
, all those fets need matching/selection in the real world.Then you might get close to something that can fit 10x10mm....
http://www.diyaudio.com/forums/solid-state/156674-my-take-buildable-discrete-op-amp.html
Søren
It's mission imposible i think (as a non EE
), best one can do is to place another pnp Q, base to gnd, in the current mirror input leg.
two stages OPS
I tried that with high gain trannies. Not a good idea. Much more distortion.
C. E.
I tried that with high gain trannies. Not a good idea. Much more distortion.
C. E.
cascode
Or a Dimitri cascode.
Dimitri Danyuk, “On the Optimization of Enhanced Cascode,” Preprint #7571, Presented at the 125th AES Convention, October 2–5, 2008 San Francisco, CA, USA.
Or a Dimitri cascode.
Dimitri Danyuk, “On the Optimization of Enhanced Cascode,” Preprint #7571, Presented at the 125th AES Convention, October 2–5, 2008 San Francisco, CA, USA.
Good to see some lively discussion, I have not seen Dimitri's article either. Also if anyone want's to post some schematics of actual changes that would be fun. I would gladly try and optimize another approach/use better devices as an educational exercise. Remember sub-PPM distortions is the stuff of simulators
The goal was to see what could be done with a single gain stage and buffer. The Aol looks to be 10^6 which is about a 10^8 Ohm DC impedance at the gain node. For distortion of course the dynamic impedance and its symmetry matter more. It's pretty decent for 23 devices.
I was hoping to try two little verticle cards in a DIP form factor not try and get something into 10mm square though a stack with through pins might work.
The extra circuitry makes it more difficult especially bypassing bias nodes.
The goal was to see what could be done with a single gain stage and buffer. The Aol looks to be 10^6 which is about a 10^8 Ohm DC impedance at the gain node. For distortion of course the dynamic impedance and its symmetry matter more. It's pretty decent for 23 devices.
I was hoping to try two little verticle cards in a DIP form factor not try and get something into 10mm square though a stack with through pins might work.
The extra circuitry makes it more difficult especially bypassing bias nodes.
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Before we go on adnauseum, the reclaiming of base current in a cascode is not new. Bipolar realizations use more stuff especially in some caes coupling capacitors, the FET's actually use less.
A quick read shows 20dB improvement on the Hawksford and I saw 23dB on the FETs, probably a wash in a real circuit.
A quick read shows 20dB improvement on the Hawksford and I saw 23dB on the FETs, probably a wash in a real circuit.
Could you elaborate? Losing the upper cascode ruins the distortion even putting a perfect mirror (ideal controlled sources) on the bottom.
The input cascode still might help at low gains (non-inverting). I might try an ideal cascode tonight and see.
I'm full of surprises. We have a large permanent installation here at Mass MOCA. My wife's first husband knew Beuys while stationed in Berlin, purely coincidence.
The avatar OTOH is Kurt (my dada hero).
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