Ian Hegglun has his own models for Exicons, perhaps they are better?
.model 10N20_ VDMOS (Rg=60 Vto={0.17-(1.6m-1m)(Temp-25)} Lambda=3m Rs={0.245(1+2.6m*(Temp-25))} Kp={1.33*((Temp+273)/(273+25))*-(2-1.5)} Ksubthres={0.095(1+2.9m*(Temp-25))} Mtriode=0.3 Rd={0.6*(1+3m*(Temp-25))} Cgdmax=500p Cgdmin=10p a=0.25 Cgs=500p Cjo=300p m=0.7 VJ=0.75 IS=4n N=1 Eg=1.5 Rb=0.2 Vds=200 Ron=1 mfg=Exicon)
.model 10P20_ VDMOS (pchan Rg=60 Vto={(-0.535+(1.7m-1m)(Temp-25))} Rs={0.37(1+3.4m*(Temp-25))} Kp={0.995*((Temp+273)/(273+25))*-(2-1.5)} Ksubthres={0.12(1+3.1m*(Temp-25))} Mtriode=0.4 Rd=0.2 Lambda=5m Cgdmax=900p Cgdmin=25p a=0.25 Cgs=900p Cjo=400p m=0.7 VJ=0.75 IS=4u N=2.4 Eg=1 Rb=1 Vds=-200 Ron=1 mfg=Exicon)
.model 20N20_ VDMOS (Rg=30 Vto={0.155-(1.6m-1m)(Temp-25)} Rs={0.12(1+2.5m*(Temp-25))} Kp={2.40*((Temp+273)/(273+25))*-(1.9-1.5)} Ksubthres={0.09(1+1m*(Temp-25))} Mtriode=0.3 Rd=0.16 Lambda=3m Cgdmax=1n Cgdmin=20p a=0.25 Cgs=1n Cjo=1n m=0.7 VJ=0.75 IS=8n N=1 Eg=1.5 Rb=0.1 Vds=200 Ron=500m mfg=Exicon)
.model 20P20_ VDMOS (pchan Rg=30 Vto={-0.61+2.2m*(Temp-25)} Rs={0.17*(1+2.0m*(Temp-25))} Kp={1.85*((Temp+273)/(273+25))*-(2-1.5)} Ksubthres={0.105(1+5m*(Temp-25))} Mtriode=0.35 Rd=0.05 Lambda=5m Cgdmax=1.9n Cgdmin=50p a=0.25 Cgs=1.8n Cjo=1n m=0.7 VJ=0.75 IS=8u N=2.4 Rb=0.5 Vds=-200 Ron=500m mfg=Exicon)
**********************************************
.model 10N20-75_ VDMOS (Rg=60 Vto={0.17-(1.6m-1m)50} Lambda=3m Rs={0.245(1+2.6m*50)} Kp={1.33*((75+273)/(273+25))*-(2-1.5)} Ksubthres={0.095(1+2.9m*50)} Mtriode=0.3 Rd={0.6*(1+3m*50)} Cgdmax=500p Cgdmin=10p a=0.25 Cgs=500p Cjo=300p m=0.7 VJ=0.75 IS=4n N=1 Eg=1.5 Rb=0.2 Vds=200 Ron=1 mfg=Exicon)
.model 10P20-75_ VDMOS (pchan Rg=60 Vto={(-0.535+(1.7m-1m)50)} Rs={0.37(1+3.4m*50)} Kp={0.995*((75+273)/(273+25))*-(2-1.5)} Ksubthres={0.12(1+3.1m*50)} Mtriode=0.4 Rd=0.2 Lambda=5m Cgdmax=900p Cgdmin=25p a=0.25 Cgs=900p Cjo=400p m=0.7 VJ=0.75 IS=4u N=2.4 Eg=1 Rb=1 Vds=-200 Ron=1 mfg=Exicon)
.model 20N20-75_ VDMOS (Rg=30 Vto={0.155-(1.6m-1m)50} Rs={0.12(1+2.5m*50)} Kp={2.40*((75+273)/(273+25))*-(1.9-1.5)} Ksubthres={0.09(1+1m*50)} Mtriode=0.3 Rd=0.16 Lambda=3m Cgdmax=1n Cgdmin=20p a=0.25 Cgs=1n Cjo=1n m=0.7 VJ=0.75 IS=8n N=1 Eg=1.5 Rb=0.1 Vds=200 Ron=500m mfg=Exicon)
.model 20P20-75_ VDMOS (pchan Rg=30 Vto={-0.61+2.2m*50} Rs={0.17*(1+2.0m*50)} Kp={1.85*((75+273)/(273+25))*-(2-1.5)} Ksubthres={0.105(1+5m*50)} Mtriode=0.35 Rd=0.05 Lambda=5m Cgdmax=1.9n Cgdmin=50p a=0.25 Cgs=1.8n Cjo=1n m=0.7 VJ=0.75 IS=8u N=2.4 Rb=0.5 Vds=-200 Ron=500m mfg=Exicon)
.model 10N20_ VDMOS (Rg=60 Vto={0.17-(1.6m-1m)(Temp-25)} Lambda=3m Rs={0.245(1+2.6m*(Temp-25))} Kp={1.33*((Temp+273)/(273+25))*-(2-1.5)} Ksubthres={0.095(1+2.9m*(Temp-25))} Mtriode=0.3 Rd={0.6*(1+3m*(Temp-25))} Cgdmax=500p Cgdmin=10p a=0.25 Cgs=500p Cjo=300p m=0.7 VJ=0.75 IS=4n N=1 Eg=1.5 Rb=0.2 Vds=200 Ron=1 mfg=Exicon)
.model 10P20_ VDMOS (pchan Rg=60 Vto={(-0.535+(1.7m-1m)(Temp-25))} Rs={0.37(1+3.4m*(Temp-25))} Kp={0.995*((Temp+273)/(273+25))*-(2-1.5)} Ksubthres={0.12(1+3.1m*(Temp-25))} Mtriode=0.4 Rd=0.2 Lambda=5m Cgdmax=900p Cgdmin=25p a=0.25 Cgs=900p Cjo=400p m=0.7 VJ=0.75 IS=4u N=2.4 Eg=1 Rb=1 Vds=-200 Ron=1 mfg=Exicon)
.model 20N20_ VDMOS (Rg=30 Vto={0.155-(1.6m-1m)(Temp-25)} Rs={0.12(1+2.5m*(Temp-25))} Kp={2.40*((Temp+273)/(273+25))*-(1.9-1.5)} Ksubthres={0.09(1+1m*(Temp-25))} Mtriode=0.3 Rd=0.16 Lambda=3m Cgdmax=1n Cgdmin=20p a=0.25 Cgs=1n Cjo=1n m=0.7 VJ=0.75 IS=8n N=1 Eg=1.5 Rb=0.1 Vds=200 Ron=500m mfg=Exicon)
.model 20P20_ VDMOS (pchan Rg=30 Vto={-0.61+2.2m*(Temp-25)} Rs={0.17*(1+2.0m*(Temp-25))} Kp={1.85*((Temp+273)/(273+25))*-(2-1.5)} Ksubthres={0.105(1+5m*(Temp-25))} Mtriode=0.35 Rd=0.05 Lambda=5m Cgdmax=1.9n Cgdmin=50p a=0.25 Cgs=1.8n Cjo=1n m=0.7 VJ=0.75 IS=8u N=2.4 Rb=0.5 Vds=-200 Ron=500m mfg=Exicon)
**********************************************
.model 10N20-75_ VDMOS (Rg=60 Vto={0.17-(1.6m-1m)50} Lambda=3m Rs={0.245(1+2.6m*50)} Kp={1.33*((75+273)/(273+25))*-(2-1.5)} Ksubthres={0.095(1+2.9m*50)} Mtriode=0.3 Rd={0.6*(1+3m*50)} Cgdmax=500p Cgdmin=10p a=0.25 Cgs=500p Cjo=300p m=0.7 VJ=0.75 IS=4n N=1 Eg=1.5 Rb=0.2 Vds=200 Ron=1 mfg=Exicon)
.model 10P20-75_ VDMOS (pchan Rg=60 Vto={(-0.535+(1.7m-1m)50)} Rs={0.37(1+3.4m*50)} Kp={0.995*((75+273)/(273+25))*-(2-1.5)} Ksubthres={0.12(1+3.1m*50)} Mtriode=0.4 Rd=0.2 Lambda=5m Cgdmax=900p Cgdmin=25p a=0.25 Cgs=900p Cjo=400p m=0.7 VJ=0.75 IS=4u N=2.4 Eg=1 Rb=1 Vds=-200 Ron=1 mfg=Exicon)
.model 20N20-75_ VDMOS (Rg=30 Vto={0.155-(1.6m-1m)50} Rs={0.12(1+2.5m*50)} Kp={2.40*((75+273)/(273+25))*-(1.9-1.5)} Ksubthres={0.09(1+1m*50)} Mtriode=0.3 Rd=0.16 Lambda=3m Cgdmax=1n Cgdmin=20p a=0.25 Cgs=1n Cjo=1n m=0.7 VJ=0.75 IS=8n N=1 Eg=1.5 Rb=0.1 Vds=200 Ron=500m mfg=Exicon)
.model 20P20-75_ VDMOS (pchan Rg=30 Vto={-0.61+2.2m*50} Rs={0.17*(1+2.0m*50)} Kp={1.85*((75+273)/(273+25))*-(2-1.5)} Ksubthres={0.105(1+5m*50)} Mtriode=0.35 Rd=0.05 Lambda=5m Cgdmax=1.9n Cgdmin=50p a=0.25 Cgs=1.8n Cjo=1n m=0.7 VJ=0.75 IS=8u N=2.4 Rb=0.5 Vds=-200 Ron=500m mfg=Exicon)
Two pots for adjustment, one for bias setting and an odd one for offset (R3). Why not having the feedback loop taking care of that? 44.~% * 500Ω is approx 220Ω! Pots will never fail in real life, not?
Bonsai request (closed?) loop gain/phase plots, I rather would like to see the open loop Bode (=gain/phase) plots.
And again, the simu's are like fairies: lovely and treacherous.
Bonsai request (closed?) loop gain/phase plots, I rather would like to see the open loop Bode (=gain/phase) plots.
And again, the simu's are like fairies: lovely and treacherous.
Or put the pot around the R8 pot, and feedback straight back from the wiper (via a 15k to replace the 12k R7) - not the 'out' node.
Then you have a local feedback amplifier, which IMO should sound better.
Given the possibility of optimistic Exicon models, the real difference is probably more than that. When I simulate with Exicon MOSFETs, I always get unbelievable THD, <0.001%.
I realize that low THD is not what many people prefer to listen to, but in the case of a complimentary follower, the distortion will be largely odd harmonic and not even harmonics, so it's unlikely to sound "better" taking feedback from the VAS.
500mA is running a little hot for my taste, largely class-A, but each to his own. I never use more than 50mA.
I would allow for compensation caps in the layout in case you need them, and an inductor+resistor build-out for feedback isolation from the speaker and cable, and maybe a Zobel.
I realize that low THD is not what many people prefer to listen to, but in the case of a complimentary follower, the distortion will be largely odd harmonic and not even harmonics, so it's unlikely to sound "better" taking feedback from the VAS.
500mA is running a little hot for my taste, largely class-A, but each to his own. I never use more than 50mA.
I would allow for compensation caps in the layout in case you need them, and an inductor+resistor build-out for feedback isolation from the speaker and cable, and maybe a Zobel.
Looks good, impressive for a single MOSFET doing local feedback.
Perhaps also in a way it's more of a current driver, so it may be kinder to a speaker - the MOSFET is perhaps more like a linear variable resistor... than a complex amplifier - but the concept doesn't rely on that. It simply means that:
1. You can seperate the high power speaker return earth completely from the driver circuit
2. Get rid of the output zobel
3. Drive any load, as it's unconditionally stable
4. The feedback doesn't fight the speaker - it's a more cooperative way, with each part left alone to function.
The last one is really the concept. The sound will, I predict, be effortless and open. It's a simple switch to try both, I actually found some miniature relays (HK4100F-12V or similar) that I'll test an amplifier with at some point, to do an A/B comparism.
Incidently - could you please point me towards a way to measure THD via LTspice? That sould help me - I don't obsess about THD, rather I pay it no attention, but at each stage it's useful to see the effects of changes so it would be useful.
As for THD itself, the purity of a 1kHz signal doesn't guarantee good musical accuracy, IM distortion and compression etc, concern me more
I also did a simulation based on the topology. Not exactly the same components but very much the same picture. The results looks very promising - there's not a lot of open loop gain to begin with, but it means the circuit will be more stable. The small peak at ~7MHz can be easily eliminated by a 3pF miller cap in simulation, but I doubt the result would be the same with your components.
The problem might be the DC offset: JFET parameters are notoriously spreaded, and you might need C3 to lower the DC offset at the output. Meanwhile, if simplicity is what you need, you can omit Q1 and Q2 (U3 and U6 in original schematic) and connect the feedback directly to the JFET source. Again we don't talk about the input offset because there's no guarantee in the first place and you can adjust it with pots anyways.
The problem might be the DC offset: JFET parameters are notoriously spreaded, and you might need C3 to lower the DC offset at the output. Meanwhile, if simplicity is what you need, you can omit Q1 and Q2 (U3 and U6 in original schematic) and connect the feedback directly to the JFET source. Again we don't talk about the input offset because there's no guarantee in the first place and you can adjust it with pots anyways.
What usually sets a design apart from the crowd is the spectrum of the distortion and its performance at 10kHz and 20kHz. 1kHz isn't too hard. 10kHz and 20kHz is trickier.
A single number for THD Distortion at 1kHz/1W isn't particularly helpful. I'd suggest sharing plots on the spectrum of the distortion. Is it odd or even dominate? Is it monotonically descending? How does it perform at higher frequencies and output levels.
Also, you're still ignoring questions on stability. Without loop gain analysis, it's like flying an airplane without a fuel level gauge and no knowledge of how big the tanks are.
A single number for THD Distortion at 1kHz/1W isn't particularly helpful. I'd suggest sharing plots on the spectrum of the distortion. Is it odd or even dominate? Is it monotonically descending? How does it perform at higher frequencies and output levels.
Also, you're still ignoring questions on stability. Without loop gain analysis, it's like flying an airplane without a fuel level gauge and no knowledge of how big the tanks are.
What about stability analysis? Gain and Phase margin. These are crucial measurements.
I'll give a hint. It's fine based on my simulations.
I'm not trying to be rude here. Just trying to help you. Bonsai is a well. We had this same discussion in your Cello thread. You have great ideas and instincts. You just need to take your simulation game a bit further and include a few more elements. Like Loop Gain analysis and FFT analysis of the harmonics.
I'll give a hint. It's fine based on my simulations.
I'm not trying to be rude here. Just trying to help you. Bonsai is a well. We had this same discussion in your Cello thread. You have great ideas and instincts. You just need to take your simulation game a bit further and include a few more elements. Like Loop Gain analysis and FFT analysis of the harmonics.