Ultra Amplifier Build Thread

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This thread is for the discussion of builds of the Ultra Amplifier as described in the main development thread: Ultra Amplifier with JFET input and Lateral MOSFET out

Thanks to @lineup for the design and to @benpe who helped with testing and editing the build guide.

This is my version of the amplifier which differs from lineup's design. Changes were made to address parts availability, stability (thermal & DC), noise, PSRR and protection. However, even with the changes, the spirit of lineups original design is maintained.

PCBs for this were designed to accommodate builds in a chassis as small as 2U x 300mm deep. The nature of Lateral MOSFETs allows the design to run as much bias as the heatsinks will allow. Although it will work in a 2U chassis, as the heatsink capacity increases, the class A region can be increased with higher output bias. Refer to section 5.6 of the build guide for PSU and heatsink sizing and it's affect on the Class A region.

The design is intended for ±24V to ±30V main rails from 18V to 22V transformer secondaries. Though not recommended, it can run as high as ±41V on 30V transformer secondaries. My build uses ±30V main rails running dual mono in a 2U chassis with 600mA of bias. This produces a 5.75W class A region with max power of 40W into 8Ω. Section 5.1.1 of the build guide discusses transformer and OPS device options and their max power potential. Within the recommended supplies, it ranges from 25W to 40W into 8Ω.

Note that my version of this design runs more NFB than lineups, resulting in a lower noise and distortion, but a lower overall gain of 15.5dB. As a result, a preamp will likely be needed to drive it to full potential. Alternatively, you can use a typical source (2Vrms or less) and be comfortable that you're unlikely to have enough input voltage to see clipping.

Build Guide & BOM
A quick note on the build guide & BOM. When I first started with this hobby, I found that some things experienced builders considered trivial confused me greatly. With this guide, I tried to include as much information as possible to assist new builders. With that said, the guide also has content specific to this design that experienced builders will likely find helpful.

Any feedback on the guide or BOM would be greatly appreciated!

V2 PSU
The V2 PSU concept is a not included in lineups design. From simulations, I found that this design benefits from higher IPS-VAS rails. 5V above the main rails seems to be the sweet spot. Benefits include:
  1. Boosting the ISP-VAS rails allow for an aggressive RC filter which significantly increases PSRR.
  2. Lower distortion at higher power levels.
  3. Increased overall output by allowing the output devices to swing closer to the rails. This also allows for higher bias settings with less dissipation than simply running higher voltage main rails.
#3 above is probably the main reason to use a boosted IPS-VAS section, rather than just higher overall rails. Especially if you combine it with the voltage drop a RC filter on the IPS-VAS rails produces.

The V2 PSU is implemented using DC-DC converters in the V2 PSU PCB. This allows the VS PSU to be established at 5V to 6V above the main rails without the need for additional transformers or a custom transformer with additional secondary windings. I got this idea from Winfield Hill's AMP-70 design. See post #20 in this thread for more info.

The V2 PSU is implemented on a separate board in the initial build for several reasons.
  1. I wasn't certain if it would work until it was actually built. I consulted with the manufacturer on my use case and they couldn't give me a clear answer. By using a separate board, I could implement changes if needed without rebuilding the entire amp.
  2. It's not clear to me if builders will like this idea. Section 5.1.3 of the build guide has various options for this including eliminating it and running a conventional single PSU.
  3. Section 5.1.4 of the build guide discusses PSRR. It shows an variant I'd like to explore of splitting the RC filter into a RCRC for improved PSRR at mains frequencies (-6dB improvement at 50Hz).
If you have any feedback on the V2 PSU, please share. For future versions of the PCBs (if they happen), the build would be simpler if the Amp and V2 PSU shared the same board.

PCBs
I have 3 pairs of the original boards available (2 Amp and 2 V2 PSU). Boards are $25 (two amp boards and two V2 PSU boards).

Shipping in the continental USA is $5. For shipping outside the USA, it looks to in the $15 to $30 range.

Build Notes
Post #49: Discussion on increasing gain
Post #69: Discussion on VAS device selection and impact of matching.

Changes
2024-09-20: Build Guide updated to V2. Added Section 5.3.1 on alternate gain settings. Corrected R8 / R9 values in section 5.4 for KSC3503d / KSA1381E combination. Added note about KSA1381E being EOL.
Post #96: Preview of changes for V2 of the schematic and Rev1 of the PCBs
 

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Several factors influence the DC offset.
  1. Gain mismatch in the VAS is the biggest culprit. Degeneration (R8/9) tames the DC offset drift with thermal changes. But it affects distortion if you take it too far. A more complex VAS configuration would mitigate this.
  2. Mismatch in the monolithic JFETs. This is not revealed in SIMs as the models are perfectly matched.
  3. Mismatch in the lateral MOSFETs. This is also hard to assess with models as they are all uniform, where actual devices vary.
It's for these reasons I opted to include feedback cap C2. You can trim the DC to NULL, but without C2 (and C1), the drift from cold to hot states is much higher. With C1 and C2 in place, it is very well behaved. Mine only drifts a few millivolts. I believe Benpes is also very well behaved. Thermal modeling in LTSpice is tedious. It takes awhile to setup, but it helps a lot to predict how the design will function in real life. As well as using device models as close as possible to the actual devices.

There's several ways to approach trimming DC offset. Not suggesting my approach is the best. I borrowed the idea from AMB Beta 24. I like it for the economy of parts. Mainly to allow everything to fit on the PCB without getting too crammed.

When designing the PCB, I tried to allow space for premium parts in these positions. The C1 footprint allows for WIMA FKP4 Metal Foil Polypropylene and the C2 footprint allows for bipolar Nichicon Muse UES 25V caps. I assume this would appeal to some builders.

Benpe and me both opted to use out of production 2SC3503E and 2SA1381E devices. These reduce the amount of trimming needed as they are more closely matched. On my build I had a batch of 10 devices each and used a simple transistor tester to further find the closest match I could for gain between the N and P channel devices. As a result, my DC was off by around 10mV or less before trimming IIRC. Once trimmed, it drifts less than 2mV from cold to hot states.

If you use the more commonly available KSC3503D / KSA1381E, you need to use different values for R8 & R9 to account for the gain differences. This was tested in simulations using models adjusted for actual measured gain of currently available devices. Hasn't been built on the bench, but I have confidence it will work. Simulated performance is a bit less than 2SC3503E / 2SA1381E, but it's minor.

Another interesting observation is the behavior of TTC004B/TTA004B in sims. Distortion was a bit worse, but the slew rate has much better symmetry than SC3503/SA1381. Not sure if this actually matters in practice though. It is only revealed at higher power levels.
 
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What a lot of work this has taken ...
Build Guide I mean.

Thank you for the acknowledgment. It took several months to complete. But it something I've wanted to do for several years now and this design was a good outlet for that. The excellent Wolverine guide and @Bonsai's HiFiSonix guides inspired me. I hope someone out there finds it helpful.
 
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One note on thermal protection circuits. You'll typically see two approaches to thermal protection to handle heatsink temps rising too high.
  1. Turn off the output relay when a certain temp is reached. The idea being that the amp is being driven too hard causing it to heat up.
  2. Turn off the PSU when a certain temp is reach.
Approach #1 has the advantage that it can be powered from the amps rails, so a separate Always-On PSU is not need for the control/protection circuits. This is how Bob Cordell implements it in Chapter 4 of his amp design book. However with this design, the heavy Class A bias means that with a 8R load, heatsink temps should drop as it is driven harder. Therefore, when considering thermal protection, it might be wiser to use approach #2 for thermal protection.
 
What models are you using for the VAS? Take a look at @cabirio's models from this thread: Tweaked BJT LTSpice models

For KSC3503D / KSA1381E those models were used. They closely matched measurements from actual devices.

For 2SC3503E / 2SA1381E, the KSC3503 model was tweaked for BF=120. That change closely matches the measure values of 2SC3503E / 2SA1381E that me and Benpe had on hand.

You can use the table in the guide to adjust for different VAS devices. This is from section 5.4:

1726429876244.png


I get a very different bandwidth. I wonder why our sims are so far apart on this. You can see my bandwidth sim in section 2.2 of the guide.
 
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Brain, Benpe
thanks for your investigation of VAS testing. this is very interesting for me because i try something on my APEX FX8 with VAS with exactly that topic.
here:
i do not know if that work by the FX8 too. but i am happy with the sound of TTA/TTC.

kr
chris
 
I have 5 pairs of boards remaining as of this post. If these all sell, we can work on a GB.

If we get to a GB, I'd really like some feedback on everyone's thoughts on the V2 PSU. Especially potential builders. Do you like it and if so, should it be incorporated into the amp PCB rather than separate?
 
The V2 thing was a concept used by Goldmund in the early 90's. It worked quite well to get the last bit of voltage swing from the lateral Mosfets. There was a build thread in this forum years ago. I think this was their schematic maybe some mods to it.

1726431744691.png