Ola
In the middle of the 80's there was an article in HiFi News and Stereo Review about harsh transistor sound. The problem there was about japanese mass-production amps versus hifi stuff from smaller companies.
Author did a series of listening sessions with different amps and listenes and found 100% correlation between a harsh sound and the level of measured radio frequencies at amp's output. He wrote that tubes and the ways they are used in amps are by themselves less suspective to passing radio frequencies through.
In the middle of the 80's there was an article in HiFi News and Stereo Review about harsh transistor sound. The problem there was about japanese mass-production amps versus hifi stuff from smaller companies.
Author did a series of listening sessions with different amps and listenes and found 100% correlation between a harsh sound and the level of measured radio frequencies at amp's output. He wrote that tubes and the ways they are used in amps are by themselves less suspective to passing radio frequencies through.
Re: Ola
Correct. The same problem is with CD players. D/A residuals must be supressed. Preamp is to be designed the way it is not affected by RF and D/A residuals.
For the same reason, signal transfer on high current level (50 Ohm load) gives much better results compared to standard solutions (voltage output with 100 Ohm - 1kOhm output impedance followed by middle impedance input like 10k - 100k).
Ola said:
Correct. The same problem is with CD players. D/A residuals must be supressed. Preamp is to be designed the way it is not affected by RF and D/A residuals.
For the same reason, signal transfer on high current level (50 Ohm load) gives much better results compared to standard solutions (voltage output with 100 Ohm - 1kOhm output impedance followed by middle impedance input like 10k - 100k).
Re: Ola
did the author see if the results would change if RF noise was eliminated from the Japanese amps? would they sound still as harsh?
The foundamental flaw in the methodology is that the author used a correlation to imply causation (?). If I ran a regression on a nation's GDP on its cumulative rainfall, the correlation would be very high but it would be crazy for me to claim that rainfalls drove GDP thus we should have more rainfall for higher GDP.
Ola said:
did the author see if the results would change if RF noise was eliminated from the Japanese amps? would they sound still as harsh?
The foundamental flaw in the methodology is that the author used a correlation to imply causation (?). If I ran a regression on a nation's GDP on its cumulative rainfall, the correlation would be very high but it would be crazy for me to claim that rainfalls drove GDP thus we should have more rainfall for higher GDP.
Re: Re: Ola
OK. I have done a great number of listenning tests with a couple of people. The same circuit, THD at 1kHz below 0.001%, IMD of the same order. The only difference was HF filtration. Quite different sound, without any doubt. Harsh and grain affected. The same for signal transfer by higher current (50 Ohm output impedance, cable and 50 Ohm load impedance). All of those theoretical disputes about 13th and 17th harmonics are simply out of the target.
millwood said:
OK. I have done a great number of listenning tests with a couple of people. The same circuit, THD at 1kHz below 0.001%, IMD of the same order. The only difference was HF filtration. Quite different sound, without any doubt. Harsh and grain affected. The same for signal transfer by higher current (50 Ohm output impedance, cable and 50 Ohm load impedance). All of those theoretical disputes about 13th and 17th harmonics are simply out of the target.
There was a lot of schematics analysis in this article and pictures of scope screen, showing in what stage and how much and radio frequency was present. Don't consider other people being stoopid.
Ola said:
I would never consider anyone stoopid.
Having said that, the foundamental flaw there is that the auditor didn't explore the sound when there is NO RF signal/distortion in the amp.
Just because two things showed up at the same time doesn't mean there is a cause-and-result type relationship, no matter how many scope pictures taken and analysis done.
You disagree?
Well, I understand that You have not read that thing, but dear to say it was fundamentally flawed.
Panzerlord, I used the first example in an ultra low distortion 600 ohm driver that I designed for Sound Technology to have max performance up to 100KHz. Worked for me, and they used it in their next generation THD analyzer.
Ola said:
my conclusion is based on your description of that article. I assumed you did a good job there.
Ola, I think you have a point.
There is a big difference between amplifier bandwidth and high frequency amplifier performance (slew rate, non-linear capacitance, xover distortion, etc). Amplifier bandwidth is usually determined by the amount of negative feedback available. With tubes, this is usually limited by the LOW FREQUENCY oscillation called 'motorboating', not just by high frequency techniques. This usually limits the max feedback in the tube amps to about 20dB.
With IC's and discrete power amps, you can have 80+ dB of feedback, because you can direct couple the stages and have no low frequency problems. Also, you can avoid transformers in the output stage. This gives you bandwidth, but not necessarily better performance at high frequencies.
When you put RF into a tube amp, you should just get a rolloff in level, without slew rate limiting. However, with a solid state power amp, you will usually get slew rate limiting somewhere, or else you have deliberately rolled off the high frequencies at the input. This is an important difference between normal tube designs, and NORMAL solid state designs
There is a big difference between amplifier bandwidth and high frequency amplifier performance (slew rate, non-linear capacitance, xover distortion, etc). Amplifier bandwidth is usually determined by the amount of negative feedback available. With tubes, this is usually limited by the LOW FREQUENCY oscillation called 'motorboating', not just by high frequency techniques. This usually limits the max feedback in the tube amps to about 20dB.
With IC's and discrete power amps, you can have 80+ dB of feedback, because you can direct couple the stages and have no low frequency problems. Also, you can avoid transformers in the output stage. This gives you bandwidth, but not necessarily better performance at high frequencies.
When you put RF into a tube amp, you should just get a rolloff in level, without slew rate limiting. However, with a solid state power amp, you will usually get slew rate limiting somewhere, or else you have deliberately rolled off the high frequencies at the input. This is an important difference between normal tube designs, and NORMAL solid state designs
I use both 1 and 2. In my 50W class A design (only simulation yet), the 1. as an active load, and 2. as a current source. The distortion preformance made my jaws drop, litterally, I tossed away those lousy resistors at once! (I`ve done simulation on a previous amp that I buildt, and the simulation resemebled the preformance in the real one...spending time in front of the simulator pays off, but doesn`t do you any good if you f.ex.connect the - to speaker directly to the ground plane on the amp-PCB, i.e. close to the small-current ground).
The - to speaker should of course connect to the HQ-point
The - to speaker should of course connect to the HQ-point
Please take care, I have found that simple is usually better, unless complication can make a better throughpath. Sometimes it does, sometimes it doesn't. Even though I found the type 1 impressive, I was working with one frequency at a time, as this was for a piece of test equipment. Generally, I personally I would avoid the complication for my own audio designs.
I`ve used standard amp stages all the way, and a simple (and very often used) global NFB network. The only "complicated " elements in my design is the active load (standard wilson current mirror), and the current sources (which need to have the highest Rout as possible).
These are simple but powerful improvements that both increases bandwith and linearity, they seem complicated beacuse there are active components involved, but f.ex. calculations would actually been more complicated withot these improvements.
I only decided what bias currents that should pass through the respective stages, plus the 2-pole CC feedback.
Ok, had to think of the input and output impedances (and capacitances) for each stage also, but that wasn`t a great issue since the circuit topology I used eliminated that problem...
Though, I would like to say, I was a bit sceptic with the wilson current wirror as an active load, the output resistance went to the roof. But the simulator showed much improvement in both distortion and stability, especially stability, due to the increased bandwith...
I`m still doing some calculations around the input resistance of the buffer stage.
After looking at it for a while, and comparing simulations with what I expect in the real world, I`ve come to the conclution that Iref (in any current mirror acting as a current source) depends (to a certain degree) upon the voltage over the resistors (hence the capacitor for filtering). The PSRR for this current source is acceptable for a regulated power supply, but for unregulated with ripple could (possibly, but not likely, I actually doubt it) be another situation....
I`ve designed a modified current source which consists of a JFET current source, and the modified wilson current mirror(which is 100% undependent of the supply voltage).
At lower railvoltage, the JFET current source source could be a stand-alone.
But with railvoltages with over +-30V it`s impossible to use the
JFET source alone, most JFET`s avaliable have a Vds,max around 30V, the largest Vds I`ve seen is 60V...now that could become a problem.
Thats why I designed this circuit, you could easily use a 20V JFET, and high voltage beta-matched BJT`s, with no loss in preformance compared to the JFET current source alone. The wilson current mirror replicates Iref 100% (and Iref is 100% undependent of rail voltage), and operates at the Vce,max of the BJT`s).
I thought this wouldn`t improve the (simulated!) distortion preformance in my 50W amp project since the powersupply is defined as batteries in the simulator. But the distortion at higher frequencies where actually improved in unbalanced mode, and in balanced mode the improvement was through the whole spectre (20Hz-20kHZ)!
I`ve designed a modified current source which consists of a JFET current source, and the modified wilson current mirror(which is 100% undependent of the supply voltage).
At lower railvoltage, the JFET current source source could be a stand-alone.
But with railvoltages with over +-30V it`s impossible to use the
JFET source alone, most JFET`s avaliable have a Vds,max around 30V, the largest Vds I`ve seen is 60V...now that could become a problem.
Thats why I designed this circuit, you could easily use a 20V JFET, and high voltage beta-matched BJT`s, with no loss in preformance compared to the JFET current source alone. The wilson current mirror replicates Iref 100% (and Iref is 100% undependent of rail voltage), and operates at the Vce,max of the BJT`s).
I thought this wouldn`t improve the (simulated!) distortion preformance in my 50W amp project since the powersupply is defined as batteries in the simulator. But the distortion at higher frequencies where actually improved in unbalanced mode, and in balanced mode the improvement was through the whole spectre (20Hz-20kHZ)!
Attachments
Nope, this configuration is used in some op-amps (a simplified , and a bit different version in f.ex. 741, not with JFET). The JFET current source is something I have seen before (I actually found it yeasterday in an old schoolbook lying around).
And I wonder why I haven`t thought of this before, the JFET gives a 100% stable Iref at all times and is totally independent of variations in the supply voltage, and the wilson mirror gives a 100% excact copy of Iref.
There is nothing wrong about this schematic, I`ve done a lot of simulations with this circuit in the last hours, and it`s working perfectly. The tail current in my input stage is rock stable, to say the least.
I`m going to do a lab with this one in a couple of days, I`ll let you know....I really don`t understand why you think this schematic is wrong, I`m 150% certain that you have misunderstood something, because I`m 150% certain that this works. Calculation, simulation and common sense tells me that!
And I wonder why I haven`t thought of this before, the JFET gives a 100% stable Iref at all times and is totally independent of variations in the supply voltage, and the wilson mirror gives a 100% excact copy of Iref.
There is nothing wrong about this schematic, I`ve done a lot of simulations with this circuit in the last hours, and it`s working perfectly. The tail current in my input stage is rock stable, to say the least.
I`m going to do a lab with this one in a couple of days, I`ll let you know....I really don`t understand why you think this schematic is wrong, I`m 150% certain that you have misunderstood something, because I`m 150% certain that this works. Calculation, simulation and common sense tells me that!
Hi,
Shouldn't R2 be in the source of Q1 instead of the gate? It looks like the IDSS of Q1 is about 80mA according to the Philips data sheet of the J108. Since your current meter shows around 5mA, I'm assuming you may have transcribed the schematic, inadvertently moving R2?
Also, since Q4 and Q6 are not part of a matched pair, I think it would be a good idea to have small emitter resistors to help equalize the currents. I've played around with current mirrors in simulation by having transistor models that are identical except for tweaking Is for a 10-20% variation between devices (making the current ratio approximately the same as the ratio of Is values in the absence of emitter degeneration). I don't think individual discrete devices track well enough to be able to get away without them. Just a thought, not meaning to nitpick here.
Another thought - have you seen the Hawksford cascode circuit? He wrote a neat article where he shows 20 dB improvement in Vas distortion from a fairly simple mod. I saw a very similar improvement in simulation. It's an interesting article to read, even if you don't use the circuit. I'd be glad to email it to you if you send me an email (since the forum email doesn't seem to work with attachments).
Shouldn't R2 be in the source of Q1 instead of the gate? It looks like the IDSS of Q1 is about 80mA according to the Philips data sheet of the J108. Since your current meter shows around 5mA, I'm assuming you may have transcribed the schematic, inadvertently moving R2?
Also, since Q4 and Q6 are not part of a matched pair, I think it would be a good idea to have small emitter resistors to help equalize the currents. I've played around with current mirrors in simulation by having transistor models that are identical except for tweaking Is for a 10-20% variation between devices (making the current ratio approximately the same as the ratio of Is values in the absence of emitter degeneration). I don't think individual discrete devices track well enough to be able to get away without them. Just a thought, not meaning to nitpick here.
Another thought - have you seen the Hawksford cascode circuit? He wrote a neat article where he shows 20 dB improvement in Vas distortion from a fairly simple mod. I saw a very similar improvement in simulation. It's an interesting article to read, even if you don't use the circuit. I'd be glad to email it to you if you send me an email (since the forum email doesn't seem to work with attachments).
YES, of course, I did that in my 50W amp schematic (http://www.diyaudio.com/forums/showthread.php?s=&threadid=23673), don`t know why I put the resistor there???
(Sorry abot that John Curl!!!!!!!)
The reason there is 5 mA, I because I pasted the wilson from the amp schematic.....
I don`t think you just can use at the datasheet when determing Iref, I`ts better to replace R2 with a potmeter and measure the voltage over R3 or just put in some values the way I did..
And yes, I`m very interested in that schematic!!!!!
my e-mail is:
frodeko@tiscali.no
THANX!!!!🙂
PanzerLord,
I think your current source is not as rock solid as you think. In your simulation with ideal battery power supplies the output current will be stable. In the real world any power supply ripple will modulate the current ouput of the JFET, since Vds will be modulated. The (almost) ideal Wilson current mirror will just copy the input modulated current into an output modulated current.
I also wonder what the purpose is of using a negative current source (i.e. with reference to the negative supply voltage) and then mirror it to get a positive current source. In this way you will have trouble to get rid of supply ripple. Why not just start with a positive current source? That could even be the same JFET. The JFET doesn't mind about polarity (being a floating current source) and will also act as a current source delivering current from its source.
Furthermore C1 in your diagram (in parallel to R3) makes no sense. It will only destroy the JFET during charging, since the JFET will get the full supply (minus 2Vbe from Q4/5).
Steven
I think your current source is not as rock solid as you think. In your simulation with ideal battery power supplies the output current will be stable. In the real world any power supply ripple will modulate the current ouput of the JFET, since Vds will be modulated. The (almost) ideal Wilson current mirror will just copy the input modulated current into an output modulated current.
I also wonder what the purpose is of using a negative current source (i.e. with reference to the negative supply voltage) and then mirror it to get a positive current source. In this way you will have trouble to get rid of supply ripple. Why not just start with a positive current source? That could even be the same JFET. The JFET doesn't mind about polarity (being a floating current source) and will also act as a current source delivering current from its source.
Furthermore C1 in your diagram (in parallel to R3) makes no sense. It will only destroy the JFET during charging, since the JFET will get the full supply (minus 2Vbe from Q4/5).
Steven
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