Hi indra1,
Notice previous post to yours M3 is the MOS-diode for X1 IGBT - then M5 is another MOS-diode that biases M3 at the threshold voltage. M5 is mounted with M5 with a thermal washer between. No heatsink is needed for these, but a small plate can be can be added for mechanical convenience.
Now with M5 and M3 from the same batch (ie same batch date mark) the threshold voltages will be close, maybe within +/-50mV without manual measuring, so good for production. I have noticed Trench FETs appear to be more closely matched than earlier generations of MOSFETs.
BTW the electrothermal simulations I provide can show what happens with different heatsinks and mounting arrangements. My apologies for not providing details for beginners - as mentioned I am working toward a white paper.
Notice previous post to yours M3 is the MOS-diode for X1 IGBT - then M5 is another MOS-diode that biases M3 at the threshold voltage. M5 is mounted with M5 with a thermal washer between. No heatsink is needed for these, but a small plate can be can be added for mechanical convenience.
Now with M5 and M3 from the same batch (ie same batch date mark) the threshold voltages will be close, maybe within +/-50mV without manual measuring, so good for production. I have noticed Trench FETs appear to be more closely matched than earlier generations of MOSFETs.
BTW the electrothermal simulations I provide can show what happens with different heatsinks and mounting arrangements. My apologies for not providing details for beginners - as mentioned I am working toward a white paper.
Nothing definite yet Ian, still have too many other things to do before the new year. But I have a need for a 25W power buffer autobias by IRFZ44 or IRF1404 family, easier for me to match and commonly available here. Wanted to use the half bridge pair IRFI4019 family which seems thermally ideal but somehow I can not make it work well enough in the sim.
Hi All,
All the autobias versions thus far are in the attached file for LTspice.
It includes the latest versions of the electrothermal subcircuits.
A tutorial for using these electrothermal 'widgets' with demo jigs is now available at my website here
https://paklaunchsite.jimdofree.com/spice-models/
@indra1, no worries, if there's anything I can help with for an autobias amp drop a post or a PM.
All the autobias versions thus far are in the attached file for LTspice.
It includes the latest versions of the electrothermal subcircuits.
A tutorial for using these electrothermal 'widgets' with demo jigs is now available at my website here
https://paklaunchsite.jimdofree.com/spice-models/
@indra1, no worries, if there's anything I can help with for an autobias amp drop a post or a PM.
Hi indra1,
Yes, that is about the simplest that works well as long as Q3 is thermally coupled to Q1 (and Q4 to Q2).
And it works without emitter degeneration resistors. I did not try that option in my earlier ramblings. Thanks for suggesting it.
I found the optimum thermal attenuation is 0.7 which means Q3 and Q4 at the case temperature of Q1 and Q2.
This can be achieved using spreader plates under Q1 and Q2 with Q3 and Q4 on the plates with their thermal washers and then large area custom thermal washers under the thermal plates to the heatsink.
At high frequencies the crossover current falls away above 500kHz at full output which is ideal to stop cross-conduction (which can overheat and destroy an amp if it continues long enough). The slew rate limits at about 30V/us allowing safe operation to 200kHz. Clip recovery is improved with a Schottky in the top rail CCS (see attached). Also I added a servo to null out the input offset (it would normally inject to the input stage -- I assume you will add one sometime).
Yes, that is about the simplest that works well as long as Q3 is thermally coupled to Q1 (and Q4 to Q2).
And it works without emitter degeneration resistors. I did not try that option in my earlier ramblings. Thanks for suggesting it.
I found the optimum thermal attenuation is 0.7 which means Q3 and Q4 at the case temperature of Q1 and Q2.
This can be achieved using spreader plates under Q1 and Q2 with Q3 and Q4 on the plates with their thermal washers and then large area custom thermal washers under the thermal plates to the heatsink.
At high frequencies the crossover current falls away above 500kHz at full output which is ideal to stop cross-conduction (which can overheat and destroy an amp if it continues long enough). The slew rate limits at about 30V/us allowing safe operation to 200kHz. Clip recovery is improved with a Schottky in the top rail CCS (see attached). Also I added a servo to null out the input offset (it would normally inject to the input stage -- I assume you will add one sometime).
Hi indra1,
Here's the electrothermal sim. With Q3 thermally coupled to Q1 (and Q4 to Q2) via Tc1 (and Tc2) respectively using spreader plates. The Idle current starts at 360mA cold, peaks at 420mA after a short delay and then falls to 330mA warmed up (plot below). So this shows over-compensation but is OK. If Q3 and Q4 are on the heatsink (no spreader plate) then start is the same, peaks at 460mA, falls to 407mA warmed up at idle. So this is undercompensated but still OK by me.
For the sake of accelerating the sims I have compressed the heatsink time scale by a factor of about 1000.
BTW I used MJE340 and MJE350 models for the bias transistors Q3, Q4. The BD139C and BD140C models seem to need better temp. co. parameters for my electrothermal subcircuits, but seem OK for ordinary fixed temperature sims.
Here's the electrothermal sim. With Q3 thermally coupled to Q1 (and Q4 to Q2) via Tc1 (and Tc2) respectively using spreader plates. The Idle current starts at 360mA cold, peaks at 420mA after a short delay and then falls to 330mA warmed up (plot below). So this shows over-compensation but is OK. If Q3 and Q4 are on the heatsink (no spreader plate) then start is the same, peaks at 460mA, falls to 407mA warmed up at idle. So this is undercompensated but still OK by me.
For the sake of accelerating the sims I have compressed the heatsink time scale by a factor of about 1000.
BTW I used MJE340 and MJE350 models for the bias transistors Q3, Q4. The BD139C and BD140C models seem to need better temp. co. parameters for my electrothermal subcircuits, but seem OK for ordinary fixed temperature sims.
Hi Indra1,
Nice.
Here's your circuit with a BJT driver -- inadequate TO-92 I know, just to show it works (you can add an appropriate driver).
To trim the 2nd harmonic I added R22 and R23. The servo makes it easier to keep the output centred to aid finding optimum bias.
With a BJT driver the optimum current is reduced from 530mA to 373mA. A BJT driver costs than laterals. THD at 1W is about the same.
Strange, when I ran it on LT-IV I got lower THD null (below). Not sure why.
BTW the bias setting is sensitive to rail voltage changes. CCS's for R15 and R17 should help.
Otherwise it's looking very promising.
Nice.
Here's your circuit with a BJT driver -- inadequate TO-92 I know, just to show it works (you can add an appropriate driver).
To trim the 2nd harmonic I added R22 and R23. The servo makes it easier to keep the output centred to aid finding optimum bias.
With a BJT driver the optimum current is reduced from 530mA to 373mA. A BJT driver costs than laterals. THD at 1W is about the same.
Strange, when I ran it on LT-IV I got lower THD null (below). Not sure why.
BTW the bias setting is sensitive to rail voltage changes. CCS's for R15 and R17 should help.
Otherwise it's looking very promising.
Hi Indra1,
Now the Pass F4 Class-A buffer with autobias can be done with minimal extra parts. And it is still "wideband" (OK to 100kHz).
There are actually 3 pairs of IRFP240/9240's. I use model area scale factor "m=3".
No source resistors are used giving high internal gm of 25A/V and 40dB of local nfb.
Using a bootstrapped +/-12V 1W converter keeps dissipation of the input buffer low and gives high PSRR with no electrolytics.
Idle current is 1A total and 46V rails give 200W of true Class-A into 4 ohms at 0.07% at 1kHz and 0.002% at 1W. Nice.
Even nicer is the idle power dissipation of 90W for 200W in Class-A, thanks to cube-law like currents.
(Recall standard push-pull Class-A needs biasing at 5A giving about 400W of power dissipation for 200W into 4 ohms.)
One question that can be answered using electrothermal models is whether three IRFP240's in parallel will be stable over temperature and with some mismatch of threshold voltages. The electrothermal simulation is included in the attached file.
It appears one bias pair (Q1,Q2) sensing voltage does not lead to current hogging. To check for hogging compare the current (Ix7-Ix1) at idle/crossover 1) at the start, then 2) at the end when hot. If (Ix7-Ix1) decreases then there is no current hogging.
@All, I'm not sure if Nelson Pass is watching this thread. Maybe someone can let him know about this mod.
Now the Pass F4 Class-A buffer with autobias can be done with minimal extra parts. And it is still "wideband" (OK to 100kHz).
There are actually 3 pairs of IRFP240/9240's. I use model area scale factor "m=3".
No source resistors are used giving high internal gm of 25A/V and 40dB of local nfb.
Using a bootstrapped +/-12V 1W converter keeps dissipation of the input buffer low and gives high PSRR with no electrolytics.
Idle current is 1A total and 46V rails give 200W of true Class-A into 4 ohms at 0.07% at 1kHz and 0.002% at 1W. Nice.
Even nicer is the idle power dissipation of 90W for 200W in Class-A, thanks to cube-law like currents.
(Recall standard push-pull Class-A needs biasing at 5A giving about 400W of power dissipation for 200W into 4 ohms.)
One question that can be answered using electrothermal models is whether three IRFP240's in parallel will be stable over temperature and with some mismatch of threshold voltages. The electrothermal simulation is included in the attached file.
It appears one bias pair (Q1,Q2) sensing voltage does not lead to current hogging. To check for hogging compare the current (Ix7-Ix1) at idle/crossover 1) at the start, then 2) at the end when hot. If (Ix7-Ix1) decreases then there is no current hogging.
@All, I'm not sure if Nelson Pass is watching this thread. Maybe someone can let him know about this mod.
Ian, I'm pretty sure that your contribution will be appreciated in A guide to building the Pass F4 amplifier thread or open a new 200W F4 thread in Pass Forum.
Hi Nelson, Thanks for taking a look. I hope you don't mind me adding autobias to your F4. Feel free to try it.
But it maybe not an F4 anymore (well, unless you say it is
). What I have been doing in this thread is a tutorial on ideas for autobias like the LT1166 but wideband and using electrothermal 'widgets' (subcircuits) to check paralleling of MOSFETs (and BJTs) with no source resistors.
I used the F4 as an example with autobias and 3 parallel IRFP240/9240's with no source resistors.
Paralleling seems stable (at least in my sims) when each pair of MOSFET's have MOS-diodes in place of source resistors and (the MOS-diodes provide a temperature stable voltage for the autobias generator transistors).
The advantage of this autobias with no source resistors is a higher gm giving lower distortion and wider Class-A region and therefore lower idle currents for Class-A. Distortion is very low for the first watt where it matters most.
@indra1, thanks for the invite to the Pass F4 built area. I may bench test my 200W autobias F4 and if I do I will post some results. I don't have a timeline so no promises. One advantage of 200W of Class-A is for those who have low sensitivity speakers (<90dB/W). Those with good speaker sensitivity (>90dB/W) can just reduce the rail voltage back to the original F4 23V for 50W, or something in between.
Meanwhile I have two more variants to post.
Anyone interested in these electrothermal 'widgets' (subcircuits) see them in this thread 5 generic electrothermal subcircuit 'widgets' for Ltspice For an Electrothermal demo – standard topology using ctrlx v12
Another example using no emitter resistors for parallel BJTs in the TBP Zero Clone
and a variation on the TCJ Unanticipated amp with autobias and Class-G added to the Class-AB+C (what Bob Cordell calls DoubleCross).
But it maybe not an F4 anymore (well, unless you say it is
). What I have been doing in this thread is a tutorial on ideas for autobias like the LT1166 but wideband and using electrothermal 'widgets' (subcircuits) to check paralleling of MOSFETs (and BJTs) with no source resistors. I used the F4 as an example with autobias and 3 parallel IRFP240/9240's with no source resistors.
Paralleling seems stable (at least in my sims) when each pair of MOSFET's have MOS-diodes in place of source resistors and (the MOS-diodes provide a temperature stable voltage for the autobias generator transistors).
The advantage of this autobias with no source resistors is a higher gm giving lower distortion and wider Class-A region and therefore lower idle currents for Class-A. Distortion is very low for the first watt where it matters most.
@indra1, thanks for the invite to the Pass F4 built area. I may bench test my 200W autobias F4 and if I do I will post some results. I don't have a timeline so no promises. One advantage of 200W of Class-A is for those who have low sensitivity speakers (<90dB/W). Those with good speaker sensitivity (>90dB/W) can just reduce the rail voltage back to the original F4 23V for 50W, or something in between.
Meanwhile I have two more variants to post.
Anyone interested in these electrothermal 'widgets' (subcircuits) see them in this thread 5 generic electrothermal subcircuit 'widgets' for Ltspice For an Electrothermal demo – standard topology using ctrlx v12
Another example using no emitter resistors for parallel BJTs in the TBP Zero Clone
and a variation on the TCJ Unanticipated amp with autobias and Class-G added to the Class-AB+C (what Bob Cordell calls DoubleCross).
Now the F4 Class-A autobias with transconductance gain by using floating power supplies. Then I add soft-clipping with some feedback from a 120m ohm current sensing resistor (R13).
THD is low until soft-clip starts to kick in at about 50W or half the output voltage swing. Voltage gain into 4 ohms is x50.
Trimpot U2 trims 2nd harmonic and the bias current trims 3rd harmonic. Vos then nulls the output DC. R4, R20, R21 trim start of the soft-clip. The FDC6320 is EOL, the FDC6321 can be used instead, (otherwise some makes of 74HCU04 but scale R9,10,11,12 by x5). Inputs are differential but can be single ended by floating 'In2' and remove R23.
BTW there is not much negative feedback used in this variant. THD is very low up to 10W because the input stage provides inverse type error correction for the output stage.
THD is low until soft-clip starts to kick in at about 50W or half the output voltage swing. Voltage gain into 4 ohms is x50.
Trimpot U2 trims 2nd harmonic and the bias current trims 3rd harmonic. Vos then nulls the output DC. R4, R20, R21 trim start of the soft-clip. The FDC6320 is EOL, the FDC6321 can be used instead, (otherwise some makes of 74HCU04 but scale R9,10,11,12 by x5). Inputs are differential but can be single ended by floating 'In2' and remove R23.
BTW there is not much negative feedback used in this variant. THD is very low up to 10W because the input stage provides inverse type error correction for the output stage.
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And a bridged F4 Class-A autobias with transconductance gain by using 2 split floating power supplies. 100W into 8 ohms. Soft clip starts at around 50W or 3/4 full swing.
Differential feedback is via the current sensing resistors. Output voltage centring is mainly via trimpots U3 and U4 but some common mode feedback is via R1 and R2 (to reduce thermal drift). Grounding 'In2' allows single-ended input but needs twice the input swing.
The use of 2 floating supplies has been bench tested on another amplifier and 2 split supplies can be reduced to 2 floating supplies (not split supplies) using electrolytic capacitors rail-to-rail to feed the speaker. This conveniently provides speaker protection against DC. Since this is a current output amp electrolytic capacitor nonlinearity does not affect the speaker current so it doesn't affect THD.
Differential feedback is via the current sensing resistors. Output voltage centring is mainly via trimpots U3 and U4 but some common mode feedback is via R1 and R2 (to reduce thermal drift). Grounding 'In2' allows single-ended input but needs twice the input swing.
The use of 2 floating supplies has been bench tested on another amplifier and 2 split supplies can be reduced to 2 floating supplies (not split supplies) using electrolytic capacitors rail-to-rail to feed the speaker. This conveniently provides speaker protection against DC. Since this is a current output amp electrolytic capacitor nonlinearity does not affect the speaker current so it doesn't affect THD
.
Ian,
Not sure you have seen this (google translate is reasonable) :
http://www.ne.jp/asahi/evo/amp/K3497J618/report.htm
The K3497/J618 have huge positive tempco.
Yet Shinichi Kamijo seemed to have managed to compensate for that without having to put anything between the Sources.
Best,
Patrick
Not sure you have seen this (google translate is reasonable) :
http://www.ne.jp/asahi/evo/amp/K3497J618/report.htm
The K3497/J618 have huge positive tempco.
Yet Shinichi Kamijo seemed to have managed to compensate for that without having to put anything between the Sources.
Best,
Patrick
Hi Patrick,
Thanks for mentioning that design. I hadn't seen it before this.
The K3497/J618 are not lateral MOSFETs (their Gm of 10A/V is way too high for lateral technology) so I'd also expect that they have a problematic positive tempco at normal Class-AB bias current levels (0.1A).
Yet, with no source resistors between them the idle current falls as the heatsink warms up. And it is interesting that using laterals 2SK1058/2SK160, the idle current also falls in a similar way to the K3497/J618 pair.
Strange, but the basic bias generator circuit does not seem to imply inherent thermal stability - because there is no sensing of source currents in the K3497/J618 pair.
So I'm at a loss to explain how it can be so stable over the heatsink temperature change. The only thing I can think is the bias generators MOSFETs Q1,Q2 warm up slightly with the heatsink due to air inside the enclosure. Unfortunately the datasheet doesn't have any tempco info to make a model, so I can't try electrothermal modelling for this biasing circuit. Maybe someone can kindly provide suitable models with reasonably realistic tempcos.
Another issue would be whether this bias idea allows paralleling (or not) assuming we want to omit source resistors?
Otherwise the amps performance is impressive - wideband, low THD at 20kHz and very clean clip recovery.
Thanks for mentioning that design. I hadn't seen it before this.
The K3497/J618 are not lateral MOSFETs (their Gm of 10A/V is way too high for lateral technology) so I'd also expect that they have a problematic positive tempco at normal Class-AB bias current levels (0.1A).
Yet, with no source resistors between them the idle current falls as the heatsink warms up. And it is interesting that using laterals 2SK1058/2SK160, the idle current also falls in a similar way to the K3497/J618 pair.
Strange, but the basic bias generator circuit does not seem to imply inherent thermal stability - because there is no sensing of source currents in the K3497/J618 pair.
So I'm at a loss to explain how it can be so stable over the heatsink temperature change. The only thing I can think is the bias generators MOSFETs Q1,Q2 warm up slightly with the heatsink due to air inside the enclosure. Unfortunately the datasheet doesn't have any tempco info to make a model, so I can't try electrothermal modelling for this biasing circuit. Maybe someone can kindly provide suitable models with reasonably realistic tempcos.
Another issue would be whether this bias idea allows paralleling (or not) assuming we want to omit source resistors?
Otherwise the amps performance is impressive - wideband, low THD at 20kHz and very clean clip recovery.