Eeh, because it is a sport to find nice ones between the great many Japanese, Thai and Indonesian brands on the market ?
Add some ebbie or fresh prawns, kepiting, daon djeroek peroet, sambal, trassi or petis oedang, koriander leaves (daon ketoembar?) and they're pretty good.
I go through a box of the stuff every two weeks, gila blanda (bidet tjebok
)
Add some ebbie or fresh prawns, kepiting, daon djeroek peroet, sambal, trassi or petis oedang, koriander leaves (daon ketoembar?) and they're pretty good.
I go through a box of the stuff every two weeks, gila blanda (bidet tjebok
)Attachments
I associate bias with a hot curry.
Our American friends have their tacos...
http://www.elmolinomexicanrestaurant.com/
Our American friends have their tacos...
http://www.elmolinomexicanrestaurant.com/
So I'm a Zen builder ... along with some SE MOSFET source follower amplifiers ...
From what I understand, it is bias current per MOSFET device, not aggregate bias current. So if you have two output devices in parallel, each device would need 2A, right?
Mr. Pass, was the graph from the original post in this thread for a single device, and is it still valid if the same 2A is distributed amongst several parallel devices?
From reading your Zen DIY papers, I've adopted the methodology of using singular output devices (non-paralleled) and driving them hard. Sure, it's hard on the transistors, but it sounds good. It seems to me that if paralleled devices are used, everything else also needs a multiplier.
[edit: of course, SE amplifiers need bias current to get output power. This isn't true to push-pull, because they can switch to class AB, but my question still applies.]
From what I understand, it is bias current per MOSFET device, not aggregate bias current. So if you have two output devices in parallel, each device would need 2A, right?
Mr. Pass, was the graph from the original post in this thread for a single device, and is it still valid if the same 2A is distributed amongst several parallel devices?
From reading your Zen DIY papers, I've adopted the methodology of using singular output devices (non-paralleled) and driving them hard. Sure, it's hard on the transistors, but it sounds good. It seems to me that if paralleled devices are used, everything else also needs a multiplier.
[edit: of course, SE amplifiers need bias current to get output power. This isn't true to push-pull, because they can switch to class AB, but my question still applies.]
lumanauw said:I cannot find the data of the bias current of those graphs. It is from DSelf book, but it seems that he believes in the voltage drop accross RE degeneration more than the bias current.
This graph is from the exactly same cct, the upper is when the output is classA (biased at 1.6A) and the lower is at the "optimally biased classB"
The classA graph has relatively steady gain between 0.980-0.985, while the lower is very curved (especially around 0V) and the gain is always less than 0.970
It's a good clue why Papa likes classA
The other insight is that bipolars measure better at small bias
currents (like 100 mA), and Mosfets not as well.
Nelson Pass said:
The other insight is that bipolars measure better at small bias
currents (like 100 mA), and Mosfets not as well.
I presume the relatively is between bipolars and mosfets vs. bipolars at 100ma and bipolars at higher bias, as 100ma is only "optimized class B" for .22ohm emitter resistors.
I re-read Practical MOSFET Testing for Audio and again came away with the impression that the distortion behavior is determined on a per-device bias current.
In your example analysis of the IRFP240 (pages 7 and 8), you found distortion is lower at high bias currents. The conclusion (page 8) was run a high bias to linearize transconductance, and to run the device "hot" by combining the bias current with voltage.
I presume if the bias current is shared across multiple paralleled devices, none of them would experience the linearize function, compared to if the same bias current was used by a single MOSFET?
To continue this discussion, why use several paralleled devices when a single, larger device could handle the bias current and have about the same gate capacitance as several paralleled devices (i.e. a TO-264 monster)? This way, the larger device would be pushed up higher on its curves?
p.s.
Being a DIY amplifier operator, I'm taking the risk of occasionally replacing transistors, whereas a commercial amplifier maker wouldn't take the risk of running transistors too hot. (That being said, tube guys need to change tubes occasionally, and it doesn't bother them, but they also don't have to resolder or use heat sink paste.)
There is a tradeoff involved. Yes, each mosfet is biased at a lower current, but at the same time, each mosfet contributes a smaller percentage of its bias current to the output. A definite plus is that the overall power dissipation is spread out between several devices, lowering the effective junction-to-case thermal resistance.
The downside of paralleling devices is that the capacitance
increases, but this is not as much of a problem as you might
think, as the primary capacitance is the Cgs. Cgs is charged
by the variation in Vgs, but that variation is inversely proportional
to the transconductance - so the Cgs currents do not scale with
parallel devices.
As a practical matter, output stages with parallel devices do
not particularly suffer increased capacitance in ordinary applications.
The upside is obvious. If you can afford to dissipate heat,
parallel devices will increase the transconductance and linearity
at the cost of high bias current.
The XA30.5 amplifier is rated at 30 watts into 8 ohms, but it
uses 20 (X 150 watt) output devices per channel and is biased
at 100 watts/ch or so. The result is respectably fast and linear.
increases, but this is not as much of a problem as you might
think, as the primary capacitance is the Cgs. Cgs is charged
by the variation in Vgs, but that variation is inversely proportional
to the transconductance - so the Cgs currents do not scale with
parallel devices.
As a practical matter, output stages with parallel devices do
not particularly suffer increased capacitance in ordinary applications.
The upside is obvious. If you can afford to dissipate heat,
parallel devices will increase the transconductance and linearity
at the cost of high bias current.
The XA30.5 amplifier is rated at 30 watts into 8 ohms, but it
uses 20 (X 150 watt) output devices per channel and is biased
at 100 watts/ch or so. The result is respectably fast and linear.
Nelson Pass said:The downside of paralleling devices is that the capacitance
increases, but this is not as much of a problem as you might
think, as the primary capacitance is the Cgs. Cgs is charged
by the variation in Vgs, but that variation is inversely proportional
to the transconductance - so the Cgs currents do not scale with
parallel devices.
As a practical matter, output stages with parallel devices do
not particularly suffer increased capacitance in ordinary applications.
The upside is obvious. If you can afford to dissipate heat,
parallel devices will increase the transconductance and linearity
at the cost of high bias current...
This would be speaking only of a Follower type of output topology, would it not??? In a paralleled Common Source circuit aren't we stuck with multiplying Cgd by the gain and summing the total capacitance??? Except for maybe in a cascoded circuit like the ZV9???
I presume the XA30.5 is running about 2 Amperes of bias current, meaning each transistor experiences 100mA bias (2 Amps / 20 paralleled devices). At 50V, this would be 100 Watts. Either way, it appears each device is dissipating only 5 Watts.
Or, in push-pull mode, you have 10 "legs" each with a complementary pair, then each leg is operating at 200mA. Same mathematics for balanced mode. Still 5 Watts per device.
Either way, 200mA is an order of magnitude off from where I'm running my Zen at 2 Amps with a single device. It's blowing off 50W, ten times that of each device in the XA30.5 (you should know, you designed both!)
I've been under the assumption that the 2A bias current is pushing the MOSFET's curves to a more favorable operating point (by a combination of current, voltage, and temperature). In the XA30.5, with each device only running 100-200mA, how do those transistors find a good operating point?
I hope I'm not being too dense here.
In conclusion, is there not a good reason to re-build my Zen with massively paralleled output devices (maybe ten), sharing the same 2A as the single IRFP044N was previously handling alone? In this case, assume cost is not issue (I've got a box of 044 FETs). The same question applies to the XA30.5. Why use paralleled devices when the Zen has proven singular devices (or complementary pairs) work?
Shouldn't you use little TO-126 devices instead, so each one is pushed up higher on its operating curves with only 5W burden? (Sure, the individual junction-to-heatsink thermal resistance would be higher, but each device's thermal dissipation is much smaller, and 20 of these combined would have better thermal resistance than a single IRFP044N.)
Thanks for starting this thread. The name "Importance" in this thread's title is very appropriate, because this thread identifies the crux of what most of this forum discusses.
flg said:
Yes and No. Remember, the transistor does not know whether it's
a follower (Common Drain) or giving voltage gain (Common Source).
The currents flowing into the Gate are strictly a function of
current and voltage variation (strictly speaking, the rate of
variation, since it's a capacitive load). Since the device follows
the same VA curve for both modes, there is no difference.
Of course there is a real functional difference between CS and CD
operation - for a given source impedance, distortions of a
CS gain device are larger by the proportion of the gain, but then
that's compared to the input signal, which of course is smaller in
CS than CD. In other words the distortion voltage is the same
actual amount, but it's ratio to the input voltage is different. A
similar argument applies to high frequency bandwidth.
And of course the effect of the input capacitance very much
depends on the source impedance - obviously the lower the
source impedance, the less effect.
Kashmire said:
As I have indicated, when you actually compare the distortion
performance of single versus parallel devices, the performance
is more a function of the total bias than that of any given device.
There are a number of reasons why that XA30.5 uses ten
devices in parallel instead of one:
1) The Zen operates with a much higher impedance seen by
the Gate of the Mosfet. In that case, bandwidth will become
more limited as you parallel devices due to Cgd. If you want
to parallel devices on the Zen, you will want to lower the input
and feedback loop impedance or otherwise lower the Gate
impedance with a driver or buffer.
2) Idle dissipation. No way am I sending an amplifier into the
field with a Mosfet dissipating 50 watts.
3) Thermal modulation. There is lower thermal variation over
the operating load line with more devices. Small, but real point.
4) Current capacity. The Zen is short proof (and limited into
low impedances) by the constant current source biasing. It
simply will not deliver high currents. The XA30.5 is designed to
deliver 30, 60, 120, and 240 watts into 8, 4, 2, and 1 ohms until
the fuse blows or the thermal switch triggers.
5) Sound. An XA30.5 with fewer devices sounds thinner and
has less control than the larger XA amplifiers. Since we want a
"family similarity" sonically, we use more devices than absolutely
necessary.
6) Convenience. I already have nice output stage boards and
heat sinks left over from the XA60.5 development. Being a
monoblock, the XA60.5 uses 40 output devices per channel.
7) I love lots of hardware in my output stage. Doesn't everybody?
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.