I'm attempting to design a feedback loop for a self-oscillating amplifier (for fun and education). I wrote a script to calculate the parameters outlined in Bruno's article, but upon simulating the feedback network transfer function in LTspice, the oscillation frequency doesn't match what I calculated (it's much higher when the entire FBN is simulated by a VCVS and much lower when the output filter is physically simulated). Does anyone smarter than I know why this might be?
For reference, the feedback network uses a KHN biquad for the proportional and derivative (lead compensator) part (I'm summing the LP and HP outputs), and there's a low-pass MFB filter for the integrator.
I've attached the LTspice file below, and you can open the Python notebook in Google Colab.
Edit: The notebook won't run in Colab I think because there's a conflicting scikit dependency, anyone is welcome to run it locally though!
For reference, the feedback network uses a KHN biquad for the proportional and derivative (lead compensator) part (I'm summing the LP and HP outputs), and there's a low-pass MFB filter for the integrator.
I've attached the LTspice file below, and you can open the Python notebook in Google Colab.
Edit: The notebook won't run in Colab I think because there's a conflicting scikit dependency, anyone is welcome to run it locally though!
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Good work - I don't think anyone here has ever produced scripts with an attempt at doing modeling, so good work thus far.
I can only recommend looking at your transfer function, your model is missing delays at the comparator stage (propergation_delay) and other bits that will definitely influence the loop and slow down global switching speed.
I can only recommend looking at your transfer function, your model is missing delays at the comparator stage (propergation_delay) and other bits that will definitely influence the loop and slow down global switching speed.
Thank you! There's a delay built into the comparator (Td parameter), but using a lossless transmission line to model delay produces the same results. I feel like it may have to do with how LTspice models Laplace transforms, because the example feedback network (UcD basically) also produces inaccurate results when simulated with a VCVS instead of passive components. I was hoping to avoid figuring out component values before time-domain modelling but I'll try computing those and modeling the physicalized circuit in LTspice.
You’re probably right — I wouldn’t recommend relying on SPICE simulations. Instead, I’d suggest using Mathcad or Matlab, assuming you have solid experience with control theory modeling. Your python code looks good though.
At this stage, I’d proceed directly with PCB design, integrating both the model and real-world variables to build a working prototype. This seems to align with Bruno’s approach as well; he avoids SPICE simulations, focusing primarily on Mathcad and MATLAB.
That said, I do believe a basic SPICE bootstrap circuit can be useful for checking essentials like steady-state behavior, parasitics modeling, and similar factors. Ultimately, it's about balancing these tools, which makes the journey both productive and enjoyable.
At this stage, I’d proceed directly with PCB design, integrating both the model and real-world variables to build a working prototype. This seems to align with Bruno’s approach as well; he avoids SPICE simulations, focusing primarily on Mathcad and MATLAB.
That said, I do believe a basic SPICE bootstrap circuit can be useful for checking essentials like steady-state behavior, parasitics modeling, and similar factors. Ultimately, it's about balancing these tools, which makes the journey both productive and enjoyable.
I've dabbled in Matlab (I have it for free because I'm a student) but my experience in control theory is limited. However, simulating it in Matlab as shown below actually reached the same oscillation results as predicted, both for UcD and a custom feedback network.
I think I'll try to optimize pole-zero placement using Matlab and my Python script before using SapWin and constraint satisfaction to find component values. I'd like to get a little closer to 70dB of loop gain. I'm also hesitant to physically prototype because of price and my lack of experience with PCB design.
One more question about feedback loop design: why don't people make the power stage non-inverting so we have more phase margin to work with and can use higher order integrators?
I think I'll try to optimize pole-zero placement using Matlab and my Python script before using SapWin and constraint satisfaction to find component values. I'd like to get a little closer to 70dB of loop gain. I'm also hesitant to physically prototype because of price and my lack of experience with PCB design.
One more question about feedback loop design: why don't people make the power stage non-inverting so we have more phase margin to work with and can use higher order integrators?
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I recommend not spending too much time on modeling alone; you still need to relate and evolve your findings through milestones and develop your own 'learning feedback.' At this point, you have a 4-pole, 4-zero transfer function, but it still needs to be applied to a large-signal model. Additionally, you’ll need to incorporate aspects not yet covered in your current model or the referenced paper. I assume your goal is solely to predict a self-oscillating model and nothing beyond that. Topics like PWM clock recovery at full modulation, Integrator clamps isn't shown, Integrator Order,
PCB cost? Come on, don't be silly. You're in the U.S., and JLCPCB will only cost you around $20. You have the time and resources to spare.
PCB cost? Come on, don't be silly. You're in the U.S., and JLCPCB will only cost you around $20. You have the time and resources to spare.
Thank you for the feedback. I'll start prototyping a PCB for the proposed feedback network I have, and hopefully use some university equipment to analyze its performance. The integrator is second order, though I am curious about using a third order integrator and a non-inverting power stage as mentioned above.
For preventing windup and facilitating recovery, I'm honestly unsure. Though this project is purely for personal use, Bruno's patent on active methods to reduce loop order is still in effect.
For preventing windup and facilitating recovery, I'm honestly unsure. Though this project is purely for personal use, Bruno's patent on active methods to reduce loop order is still in effect.
As an update, I reached -116 THD in simulation (Matlab) with the following FBN architecture. The FBN has almost 80dB of gain, though it's mixed feedback (not purely from the output filter). Going to figure out component values and prototype now so I can test output impedance and THD+N. If anyone wants the transfer functions of the stages, they're saved (rather messily) in the notebook. The entire project can be found on GitHub.
Be careful, in simulations like these, the plant is LTI (linear time invariant) and is just what we describe it as, and if we forget / fail to describe it correctly, the results wouldn't be anywhere close to real life. For example, the pole-zero locations could change with load characteristics etc. Any simulation is only as good as the models it uses.