The "weak" point of TandyMOS is the VAS: it works alright, but it is the main source of non-linearity.
It is relatively simple, and delivers a near rail-to-rail output, but its uncorrected THD is around 1%. Of course, the OLG is huge and reduces it to very low levels, but a better performance would be welcome.
The THD originates mainly from the Early effect, and it could certainly be addressed with the usual remedies, cascodes, etc., but they would require additional transistors and reduce the output swing, which I would like to avoid.
I have the feeling that this Early effect could be compensated with relatively simple means, but so far I have been unable to crack that particular nut.
Does someone have a good idea (Steve?)
It is relatively simple, and delivers a near rail-to-rail output, but its uncorrected THD is around 1%. Of course, the OLG is huge and reduces it to very low levels, but a better performance would be welcome.
The THD originates mainly from the Early effect, and it could certainly be addressed with the usual remedies, cascodes, etc., but they would require additional transistors and reduce the output swing, which I would like to avoid.
I have the feeling that this Early effect could be compensated with relatively simple means, but so far I have been unable to crack that particular nut.
Does someone have a good idea (Steve?)
Hmm, I simmed the frontend (fully unloaded) and while I get overall agreement (open-loop gain, etc) I found that the HD at 1kHz (with gain 470) gives completely different result, much better with 0.0016%. Increasing the input cap to insane value was required to avoid the settling tail from the sine's turn-on transient spoiling the results.
Thanks for your efforts, but you have used the circuit in closed loop mode, at a gain of 470, which is much lower than the OL of ~400,000.
It improves the linearity by a large factor, which explains the good figure.
I have used this configuration just to be able to collect the voltage input and offset in OL mode.
It improves the linearity by a large factor, which explains the good figure.
I have used this configuration just to be able to collect the voltage input and offset in OL mode.
This shows what I am looking for:
In this example, D3 and D6 introduce signal-dependent non-linearities combating the Early effect, but the improvement is only ~12dB (my aim is a minimum of 20dB), and the correction isn't very robust and needs to be tweaked for optimum results.
Thus, there is a lot of room for improvement, but it shows what I am after
In this example, D3 and D6 introduce signal-dependent non-linearities combating the Early effect, but the improvement is only ~12dB (my aim is a minimum of 20dB), and the correction isn't very robust and needs to be tweaked for optimum results.
Thus, there is a lot of room for improvement, but it shows what I am after