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Support for Botic Linux driver

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#442
Miero, just wanted to let you know that your latest beta kernel resolved the CIFS/NFS unmount on shutdown issue. I get a clean shutdown now under all conditions I was able to test.

Also tested:

PCM multi-channel(8)
PCM up to 384/32
DSD 64/128
I2C control of DAC and reading of B3 switches. All good!

Happy listening!

Cheers!
Russ
 
#443
Russ White said:
Miero, just wanted to let you know that your latest beta kernel resolved the CIFS/NFS unmount on shutdown issue. I get a clean shutdown now under all conditions I was able to test.

Also tested:

PCM multi-channel(8)
PCM up to 384/32
DSD 64/128
I2C control of DAC and reading of B3 switches. All good!

Happy listening!

Cheers!
Russ
Click to expand...

Hi Miero,

could you leave us a message please if there is a new image to download >v3.2.

Regards.
 
#447
ChrisMmm said:
I used that guide some time back - works well. With the Botic distro as a base the install is easier and there is no need for the script to get it to start automatically. This is my cheat-sheet.
Click to expand...
Brilliant. Squeezelite installed onto the Botic build and playing away nicely as I type, thanks Chris 🙂

DSC_0383.JPG


The only change I needed to make from your instructions was here:

Code: 
4. Create a startup scrip to execute during boot-up
nano etc/init.d/startup.sh

Where it seems you missed the first leading slash off the file path, so Nano wouldn't let me save the file.
Once I typed it as
Code: 
nano /etc/init.d/startup.sh
it all worked nicely 🙂

It would still be very lovely to have a Botic kernel to drop into SOA, but this is a great alternative for now 🙂

thanks again Chris and of course Miero
 
#448
I managed to get DSD_U32_BE support up-and-running on Fedora 21 ARM on the BBB with the botic driver. There is still a small amount of background hiss when playing but that should be fixable by adjusting the driver or using real chronos/hermes hardware.

Code: 
[kramer@bbb-f21 ~]$ cat /proc/asound/BOTICAudio/pcm0p/sub0/hw_params 
access: MMAP_INTERLEAVED
format: DSD_U32_BE
subformat: STD
channels: 2
rate: 88200 (88200/1)
period_size: 4096
buffer_size: 16384

BTW I have update my MPD 0.18 dsd repo to MDP 0.18.22 with RT patches.
 
#449
Hi Miero,
I know it's not standard functionality from your driver right now and also that it's a busy time, so I imagine you are not open to feature requests at the moment, but last night I was reading your documentation for your driver again and it made me wonder...
I have a DDDAC which uses a pair of pcm1794 in mono mode in each dac deck, so 1 chip for left and 1 for right. In order to achieve this, the mainboard uses shift registers to split the i2s signal into separate left and right data signals and align their timing so each dac chip receives a data signal just for that channel at the same time.

I see in your documentation you state that your driver can have up to 4 data outputs and also that it's possible to change whether it's i2s, left or right justified, so I wonder, do you think it could be possible in the future to configure your driver to output 2 individual channel mono data signals for right and left channels to use with dual mono DACs like mine?
Thanks,
James
 
#450
dwjames: it should be possible to configure ALSA to reroute channels...

1) create .asoundrc file in the home directory of user who plays music (e.g. in /var/lib/mpd for mpd)

pcm.split {
type route;
slave.pcm "hw:0,0";
slave.channels 4;
ttable.0.0 1;
ttable.0.1 1;
ttable.1.2 1;
ttable.1.3 1;
}

ctl.split {
type hw;
card 0;
}
Click to expand...

2) change player configuration to use "split" audio device
 
#454
stijn001 said:
Very intresting prospect.

@Miero, at what pins on the BBB would the seperate feeds be? Or where is the physical seperation achieved?
Click to expand...
from http://bbb.ieero.com/

Code: 
---------------
BBB pin mapping
---------------

P9_25 - A14/0 - mcasp0_ahclkx (oscillator) - GPIO3_21
P9_31 - A13/0 - mcaps0_aclkx (bit clock) - SPI1_SCLK
P9_29 - B13/0 - mcasp0_fsx (lr clock) - SPI1_D0
P9_30 - D12/0 - mcasp0_axr0 (data0) - SPI1_D1
P9_41 - D13/0 - mcasp0_axr1 (data1) - GPIO3_20 shared pin with D14
P9_?? - ?12/2 - mcasp0_axr2 (data2) - configurable, see bellow
P9_27 - C13/2 - mcasp0_axr3 (data3) - GPIO3_19
P9_24 - D15/7 - uart1_txd (external masterclock switch) - GPIO0_15
P9_26 - D16/7 - uart1_rxd (I2S/DSD format switch)- GPIO0_14
P9_14 - U14/7 - gpmc_a2 (cape power switch) - EHRPWM1A

Default mode (kernel param snd_soc_botic.pinconfig=default or not set)
P9_42 - B12/2 - mcasp0_axr2 (data2) - GPIO3_18

Compat mode (kernel param snd_soc_botic.pinconfig=compat)
P9_28 - C12/2 - mcasp0_axr2 (data2) - SPI1_CS0 shared with HDMI audio output

Will the TP cape have outputs for more than 1 data channel?
 
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