Hi,
I'm in the process of upping my game by going to try and use two TDA1541s in differential mode to explore potential sonic benefits compared to a single TDA chip. I'm currently using a simple I/V resistor followed by a 6C7/6SN7GT based gain stage+cathode follower inspired by JE Labs, which doesn't sound to bad at all!
Given I have a few 6SN7GTs lying around, I wanted to see if I could use these in balanced using a differential amplifier, and after my initial attempt failed, I decided to do some more reading/simulations, with the following schematic as a result:
It seems to behave as expected, but I'm keen to hear peoples thoughts on the values of the resistors/operating points, in the current simulation the Ra is set at 47k. to note, I also have a B+ of +/- 350V available, if that results in sonic benefits I'm open to use that as well.
Also I guess there is no way of getting rid of the input capacitors, other than a transformer or different topology (the non balanced solution doesn't need these capacitors which makes it attractive, but I'm open to other schematics.
Any feedback / criticism more than welcome!
Thanks in advance - Matthew
I'm in the process of upping my game by going to try and use two TDA1541s in differential mode to explore potential sonic benefits compared to a single TDA chip. I'm currently using a simple I/V resistor followed by a 6C7/6SN7GT based gain stage+cathode follower inspired by JE Labs, which doesn't sound to bad at all!
Given I have a few 6SN7GTs lying around, I wanted to see if I could use these in balanced using a differential amplifier, and after my initial attempt failed, I decided to do some more reading/simulations, with the following schematic as a result:
It seems to behave as expected, but I'm keen to hear peoples thoughts on the values of the resistors/operating points, in the current simulation the Ra is set at 47k. to note, I also have a B+ of +/- 350V available, if that results in sonic benefits I'm open to use that as well.
Also I guess there is no way of getting rid of the input capacitors, other than a transformer or different topology (the non balanced solution doesn't need these capacitors which makes it attractive, but I'm open to other schematics.
Any feedback / criticism more than welcome!
Thanks in advance - Matthew
I just realized that the long tailed pair, and the consequential voltages, requires the coupling caps. I overlooked that at first.
But, if you are willing to build a negative DCV supply for the long tail (or solid state CCS, even a 2 lead CCS diode), you can simplify the circuit . . .
5O Ohms to ground, and 470 Ohm grid stoppers from there to the grids.
I have always thought it could be a good idea to try is to use 2 DACs, with the LSB-all the-way to the MSB, wires are swapped on DAC # 2.
Please let us know how this works out.
Thanks!
But, if you are willing to build a negative DCV supply for the long tail (or solid state CCS, even a 2 lead CCS diode), you can simplify the circuit . . .
5O Ohms to ground, and 470 Ohm grid stoppers from there to the grids.
I have always thought it could be a good idea to try is to use 2 DACs, with the LSB-all the-way to the MSB, wires are swapped on DAC # 2.
Please let us know how this works out.
Thanks!
Last edited:
@6A3sUMMER Thanks, let me think about that negative DC supply/CCS.
I'm using an iancanada board that splits the signal into left and right, and use one TDA1541 per channel. Each TDA1541 provers a positive and negative so that (in theory) all internal noise gets cancelled in the differential amplifier.
@rayma with the above values, the plates are at +/- 160Vs and 2.5mA is running per side
Thanks!
I'm using an iancanada board that splits the signal into left and right, and use one TDA1541 per channel. Each TDA1541 provers a positive and negative so that (in theory) all internal noise gets cancelled in the differential amplifier.
@rayma with the above values, the plates are at +/- 160Vs and 2.5mA is running per side
Thanks!
Also, what is the TDA1541 output DC offset voltage in your circuit?
Does it have any output coupling capacitors before the 50 ohm resistors, probably not?
Just as an example, here is one approach with direct coupling to the tube.
https://ptodorov.com/tda1541-and-ecc88-dac-part-1/
Does it have any output coupling capacitors before the 50 ohm resistors, probably not?
Just as an example, here is one approach with direct coupling to the tube.
https://ptodorov.com/tda1541-and-ecc88-dac-part-1/
Last edited:
I haven’t measured the DC offset, currently in non balanced mode, I’m feeding the output straight to the grid. My thinking (perhaps naively) would be that some milivolts DC would not upset the circuit too much (it’s small compared to the bias point) and was hoping the same would hold in balanced mode 😉
You'll need to actually measure the DC offset to know what you can and cannot do.
It may be possible to directly couple to the grids, and use a negative supply or CCS for the cathodes.
It may be possible to directly couple to the grids, and use a negative supply or CCS for the cathodes.
Post # 5 schematic:
L1, R1, and C1 are a low pass filter.
Series resonance is at 23.2kHz.
R3, 100k Ohms, and the Miller Effect Capacitance to the grid, is a low pass filter, at perhaps 20k or 25kHz.
Although R3, 100k, is not intended to be a grid stopper; it also serves that purpose too.
Is there too much low pass filtering?
What is the expected high frequency roll off?
L1, R1, and C1 are a low pass filter.
Series resonance is at 23.2kHz.
R3, 100k Ohms, and the Miller Effect Capacitance to the grid, is a low pass filter, at perhaps 20k or 25kHz.
Although R3, 100k, is not intended to be a grid stopper; it also serves that purpose too.
Is there too much low pass filtering?
What is the expected high frequency roll off?
With DC coupling to the grids some offset doesn’t matter, as long as it is the same on both outputs. Biasing will be contolled by a CCS to a negative voltage source, not so many volts needed.
Another solution, if the offset is the same with resistive I/V, is to use a non centretapped small signal transformer as no current will flow through the primary winding. This is a good way to get HF filtering(depending on transformer bandwith) and conversion from balanced to unbalanced. The transformer can also be used to add some gain.
Curious, where can I buy the 2x1541 DAC board?
Another solution, if the offset is the same with resistive I/V, is to use a non centretapped small signal transformer as no current will flow through the primary winding. This is a good way to get HF filtering(depending on transformer bandwith) and conversion from balanced to unbalanced. The transformer can also be used to add some gain.
Curious, where can I buy the 2x1541 DAC board?
If you should use a solid-state current source, it's best not to use an LM334, as they are quite noisy. The noise would largely cancel if the output were differential as well, but I see in post #1 that you take a single-ended signal from one of the anodes.
@batteryman was so kind to sell me a board, although at this phase I'm still breadboarding it. He's using a transformer (Sowter) to unbalance as well as to provide some gain. These Sowter's are nice and can stand some offset DC, but are not cheap. Although this is a path I might eventually walk, for now I was hoping to go without transformer.
Once I finish the breadboard I'll measure the DC offset between the two outputs and see if I can suffice with a simpler transformer.
If people have suggestions for a CCS I'm open to those as well 🙂
What would life be without google, this is what I came up with now (and 15 more ideas, but that's besides the point):
Ra = 27k and the RK under the CCS is 190 ohm, resulting in 8mA per half of the 6SN7. The plate sees 112V. According to the loadline calculator in trioda.com, this should result in a minimal H3 distortion with decent overall exposure.
I also read people preferring two 10M45S, any subjective opinions on that?
Also instead of using a 10M45S, would two batteries for biasing also work? thanks for all the inputs!
Ra = 27k and the RK under the CCS is 190 ohm, resulting in 8mA per half of the 6SN7. The plate sees 112V. According to the loadline calculator in trioda.com, this should result in a minimal H3 distortion with decent overall exposure.
I also read people preferring two 10M45S, any subjective opinions on that?
Also instead of using a 10M45S, would two batteries for biasing also work? thanks for all the inputs!
The 6SN7 cathodes are at 2.33VDC.
If the 10M45S's resistor Rk bottom is connected to ground, there is not enough voltage across the 10M45S.
I think the burden voltage of the 10M445 is about 10V. Less than that, it becomes more like a wimpy resistor, and less like a current source.
You need a negative voltage supply at the bottom of Rk.
Trying a battery in series from 50 Ohms to the grids would be cute, but . . . the 2 triode plate currents will probably not be equal, and the plate voltages will be different.
The CCS is needed so that the parallel cathodes can "see" each other. That "vision" reduces 2nd Harmonic distortion.
When you get done building the circuit, you can use the other plate output too, and that will allow you to use a balanced amplifier.
I have a CD player with balanced XLR outputs, so I can do "push pull' with no inverter in the power amplifier.
The volume control is a very good Shunt circuit.
Have Fun!
If the 10M45S's resistor Rk bottom is connected to ground, there is not enough voltage across the 10M45S.
I think the burden voltage of the 10M445 is about 10V. Less than that, it becomes more like a wimpy resistor, and less like a current source.
You need a negative voltage supply at the bottom of Rk.
Trying a battery in series from 50 Ohms to the grids would be cute, but . . . the 2 triode plate currents will probably not be equal, and the plate voltages will be different.
The CCS is needed so that the parallel cathodes can "see" each other. That "vision" reduces 2nd Harmonic distortion.
When you get done building the circuit, you can use the other plate output too, and that will allow you to use a balanced amplifier.
I have a CD player with balanced XLR outputs, so I can do "push pull' with no inverter in the power amplifier.
The volume control is a very good Shunt circuit.
Have Fun!
Last edited:
Some N-channel JFET with a pinch-off voltage less negative than -2 V and an IDSS greater than 5 mA with a suitable source resistor could do the trick.
MarcelvdG,
Example JFET CCS:
Suppose the source resistor is 50 Ohms.
8mA + 8mA = 16mA for the two triodes.
16mA x 50 Ohms = 0.8V
Suppose the JFET requires 1.5V to be beyond (above) the drain's Ohmic region.
And the 50 Ohm resistor requires 0.8V
1.5V + 0.8V = 2.3V
There is no room for signal voltage swing of the JFET CCS, because the cathodes are only at 2.33V (30mV voltage swing is all that is allowed).
Again, a negative supply is required for the CCS.
My favorite, and most often used in my amplifiers, is a CCS and coupled cathodes, to do the duty of phase inversion.
I have played all those games, to eliminate the need for those negative supplies for the CCS.
Sometimes I can use an IC CCS, sometimes I can not use an IC for the CCS.
NPN CCS:
The lowest burden voltage CCS I ever built was a very low saturation voltage NPN (50mV), with an emitter resistor to ground.
The voltage reference was a 1.7V LED. Next time I might use a series pair of silicon diodes as a 1.2V reference; or 2 Schottky diodes.
(NPNs that are out of saturation, are already out of the Ohmic region, so we are "good to go").
The tradeoff of mid versus low reference voltage . . . is how low of an emitter current sense resistor can be used, so the NPN is still a good CCS.
Example JFET CCS:
Suppose the source resistor is 50 Ohms.
8mA + 8mA = 16mA for the two triodes.
16mA x 50 Ohms = 0.8V
Suppose the JFET requires 1.5V to be beyond (above) the drain's Ohmic region.
And the 50 Ohm resistor requires 0.8V
1.5V + 0.8V = 2.3V
There is no room for signal voltage swing of the JFET CCS, because the cathodes are only at 2.33V (30mV voltage swing is all that is allowed).
Again, a negative supply is required for the CCS.
My favorite, and most often used in my amplifiers, is a CCS and coupled cathodes, to do the duty of phase inversion.
I have played all those games, to eliminate the need for those negative supplies for the CCS.
Sometimes I can use an IC CCS, sometimes I can not use an IC for the CCS.
NPN CCS:
The lowest burden voltage CCS I ever built was a very low saturation voltage NPN (50mV), with an emitter resistor to ground.
The voltage reference was a 1.7V LED. Next time I might use a series pair of silicon diodes as a 1.2V reference; or 2 Schottky diodes.
(NPNs that are out of saturation, are already out of the Ohmic region, so we are "good to go").
The tradeoff of mid versus low reference voltage . . . is how low of an emitter current sense resistor can be used, so the NPN is still a good CCS.
Last edited:
For the battery I was thinking of replacing the CCS with two batteries in series, connected to the bottoms of the two halves of the 6SN7, and the ground on the other side, and keep the 50 ohm IV resistors connected to the ground as well.
I do have a negative 15v available in the supply of the DAC or can always add another transformer to use the 10M45S.
I’ll do some modelling with JFets as well, if only just to learn a bit. For which this thread and forum is excellent. Thanks guys!
I do have a negative 15v available in the supply of the DAC or can always add another transformer to use the 10M45S.
I’ll do some modelling with JFets as well, if only just to learn a bit. For which this thread and forum is excellent. Thanks guys!
I assumed a tail current of 5 mA, as that is what is shown in post #1. I don't know why that value was chosen.
In theory VDG has to be greater than -Vp to keep the FET in saturation. That's only a very rough first-order approximation, though.
If the input is driven by a balanced signal, the cathode node should only move up.
Nonetheless, it is all quite tight.
That should work better than my JFET idea.
A Battery from ground to the parallel cathodes, is a very low impedance.
The CCS and parallel cathodes advantage of the reduction of 2nd Harmonic Distortion does not work with cathode battery bias.
If you are serious about using battery bias, you can use a 9V battery (Alkaline '9V's are about 9.6V).
Connect the negative lead (-) from the 50 Ohm DAC load resistor, and the positive lead (+) to g1 grid.
Now, with 2.3V 6SN7 bias, the CCS will see 9.6V + 2.3V = + 11.9V at the top of the CCS, that has its bottom lead grounded.
Lots of voltage for just about any CCS, including the signal voltage swing (for single ended drive); and signal swing, a non-issue for differential signals, since both g1's are driven in opposite phase.
The real problem with that idea, is you need to use Very Well Matched triode sections in the same glass envelope.
Note: the grid current is zero, since the CCS biases the tubes so that the grid voltage is more than 2.3V negative, versus the cathode voltage.
The CCS and parallel cathodes advantage of the reduction of 2nd Harmonic Distortion does not work with cathode battery bias.
If you are serious about using battery bias, you can use a 9V battery (Alkaline '9V's are about 9.6V).
Connect the negative lead (-) from the 50 Ohm DAC load resistor, and the positive lead (+) to g1 grid.
Now, with 2.3V 6SN7 bias, the CCS will see 9.6V + 2.3V = + 11.9V at the top of the CCS, that has its bottom lead grounded.
Lots of voltage for just about any CCS, including the signal voltage swing (for single ended drive); and signal swing, a non-issue for differential signals, since both g1's are driven in opposite phase.
The real problem with that idea, is you need to use Very Well Matched triode sections in the same glass envelope.
Note: the grid current is zero, since the CCS biases the tubes so that the grid voltage is more than 2.3V negative, versus the cathode voltage.
Post # 12 listed 8 mA per 6SN7 triode.
Any JFET that I know of, with the drain out of the Ohmic region at only 50mV Vds, supplies Less than 1mA of current.
In the old days, before JFETs were common, and before IC CCS were common, . . . the CCS of the day were NPN transistors.
I think the NPN CCS idea went away . . . because everybody wanted to use the very latest whiz-bang devices.
I feel "more [voltage] Burdened" with ICs, JFETs, and even with MOSFETs.
Yes, I used them too, but then I discovered the old NPNs usually met my needs better.
A low current, low burden voltage example:
A pair of 12AX7 triodes is not an easy job for a CCS. The 12AX7 bias voltate is low, so the burden voltage is very small, and usually there is a need for a negative supply to run the CCS.
A 6.3VAc filament secondary, a Schottky bridge, and some very high uF capacitors in a CRC for filtering, may be all that is needed for the negative supply.
Burden voltage is most often:
The minimum working voltage across the IC CCS, JFET, MOSFET, or NPN . . .
Plus the voltage across any current sense resistor that may, or may not, be required.
Any JFET that I know of, with the drain out of the Ohmic region at only 50mV Vds, supplies Less than 1mA of current.
In the old days, before JFETs were common, and before IC CCS were common, . . . the CCS of the day were NPN transistors.
I think the NPN CCS idea went away . . . because everybody wanted to use the very latest whiz-bang devices.
I feel "more [voltage] Burdened" with ICs, JFETs, and even with MOSFETs.
Yes, I used them too, but then I discovered the old NPNs usually met my needs better.
A low current, low burden voltage example:
A pair of 12AX7 triodes is not an easy job for a CCS. The 12AX7 bias voltate is low, so the burden voltage is very small, and usually there is a need for a negative supply to run the CCS.
A 6.3VAc filament secondary, a Schottky bridge, and some very high uF capacitors in a CRC for filtering, may be all that is needed for the negative supply.
Burden voltage is most often:
The minimum working voltage across the IC CCS, JFET, MOSFET, or NPN . . .
Plus the voltage across any current sense resistor that may, or may not, be required.
Last edited:
The 10M45S (or 10M90S to be precise) should be arriving this week, so good time to ask for a last sanity check, before hitting the soldering iron 🙂
I'd like to confirm my understanding of the schematic: This is how understand it, but feel free to tell me I'm insane 🙂 :By having a constant current of in this case 14mA set by rk_ccs = 220, the voltage at the grid is controlled (and reaches the desired 1.3V).
R2 subsequently drops some voltage, but the current and therefore the cathode voltage doesn't change. This however affects the voltage at the Anode of the 10M45S. Which leads me to the question, is a resistor needed at all and if so what would be a good value? For example if I make R2 100 ohms, Ie see -7.9V:
Also if I make a negative B- of -21V, is that sufficient or would a higher voltage be better? For now I have a 18V transformer which I intend to rectify with another 6x4 and add a CLC filter, although this might be overkill.
Thanks in advance!