Been tracing out this new es9039q2m DAC to give it cleaner supply to the relevant parts. Does anybody know how the voltage ist regulated in the following configuration?
I can't find where the pins 3 and 5 of the OPA1612 are going to. They certainly control the output voltage. Haven't seen this regulation scheme before.
I can't find where the pins 3 and 5 of the OPA1612 are going to. They certainly control the output voltage. Haven't seen this regulation scheme before.
The schematic has errors. With 12V input, and unity gain, the output can only be 3.3V if the +input of the opamps is 3.3V.
So that has to be present at pin 3 and pin 5.
If that 3.3V reference is low noise and stable, it will be an excellent voltage regulator.
You can call it a voltage regulator but you can also see it as a unity gain DC amplifer with a 3.3V input.
Jan
So that has to be present at pin 3 and pin 5.
If that 3.3V reference is low noise and stable, it will be an excellent voltage regulator.
You can call it a voltage regulator but you can also see it as a unity gain DC amplifer with a 3.3V input.
Jan
Yes pin 3+5 have a common 3.3v source.
The reason for this approach escapes me.
You need a very good regulated 3.3v to make this a very good 3.3v regulator. 🤔
The only reason I can think of would be perfect symmetry for both avcc supplies. It is indeed perfectly symmetrical to three digits behind the dot.
What about the+12v supply, does it also have to be high quality?
The reason for this approach escapes me.
You need a very good regulated 3.3v to make this a very good 3.3v regulator. 🤔
The only reason I can think of would be perfect symmetry for both avcc supplies. It is indeed perfectly symmetrical to three digits behind the dot.
What about the+12v supply, does it also have to be high quality?
P.S. Bur OPA1612 is not a good choice for this, much better are AD8397, OPA1656, etc.
Why not? The OPA1612 has far less voltage noise than your alternatives.
The opamp has a very high power supply rejection ratio, meaning that any effects from the power supply on the output is reduced by 100,000 or so. The output depends almost exclusively on the quality of the 3.3V reference.Yes pin 3+5 have a common 3.3v source.
The reason for this approach escapes me.
You need a very good regulated 3.3v to make this a very good 3.3v regulator. 🤔
The only reason I can think of would be perfect symmetry for both avcc supplies. It is indeed perfectly symmetrical to three digits behind the dot.
What about the+12v supply, does it also have to be high quality?
As Marcel mentioned, an integreated voltage regulator is a reference and 'opamp' in one package, exactly the same concept.
The reason for doing it the way they did could be both quality and cost. Avcc symmetry almost certainly no factor.
It is very unlikely that sub-optimzing at this location has any useful impact on the overall final result.
Jan
Yes, sure.Can this really be considered as two separate supplies?
I often use this for 2 channels PS/
And also place a big electrolytic capacitors at the OP's outputs (100-470uF).
Yes, my alternatives have a slightly higher noise level (which is usually enough), but also a higher output current.Why not? The OPA1612 has far less voltage noise than your alternatives.
Alex.
ESS datasheets and evaluation boards have promoted similar scheme for many years (see e.g. ES9028Q2M datasheet). The buffer opamp is preceded by a cheap regulator + LPF. This results in very low THD+N within audio frequencies so good for the "numbers game", but 1/f noise is poor. No wonder many cheap DACs use it.
Did you ever do a SQ evaluation of this? Is this something to chase? Whats your opinion?ESS datasheets and evaluation boards have promoted similar scheme for many years (see e.g. ES9028Q2M datasheet). The buffer opamp is preceded by a cheap regulator + LPF. This results in very low THD+N within audio frequencies so good for the "numbers game", but 1/f noise is poor. No wonder many cheap DACs use it.
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Electric circuit 1/f noise is uncorrelated but the clock noise would be correlated - right? So perhaps its not a real SQ problem when coming from circuits? This is nt to say that clock noise if a problem - maybe it is - it seems not really investigated properly - my test/experiance show perhaps not..
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Not sure about that. Noise of reference voltage causes AM noise. Don't know if that is uncorrelated. But random and flicker noise of clocks is not correlated either.Electric circuit 1/f noise is uncorrelated but the clock noise would be correlated - right?
It's not additive noise. Low-frequency noise on a DAC or ADC voltage reference amplitude-modulates the signal, causing sidebands around the spectral peaks of the signal. Conventional wisdom has it that such sidebands are well-masked, but I doubt that everyone would agree to that. White noise on the reference could cause a noise floor that varies with the signal or just add constant noise, depending on the details of the DAC.
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