Return of my differential VAS

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#42
Steve Dunlap said:



Hi Scott,

I wasn't trying to imply anything here, just pointing out why the circuit might look familiar to Bear.

"As I stated the first time it's was an attempt at a complimentary version of the OPA627."

Remember, I'm relatively new here and haven't gone back and read all the older threads. Apparently I missed the thread were you stated that the first time.
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No, it's me just trying not to distract with worries about where something first appeared. JC likes the single transistor takeoff from the FET quad and I wanted to explore an alternative. Also as usual I consider all public postings public domain for whatever they're worth one way or the other.


BTW - I think mlloyd1 has a copy of that book (which I never heard of), I would certainly like to see that circuit since I have never seen anything from Krell or ML that looked like this. They seemed to prefer lots of elaborate cascodes.
 
#45
Q3 and Q8 (as diodes) have low impedance plus 500ohms.
Then this uncertain bipolar tail current is mirrored to JFETs?
I don't understand how to calculate this current because
it is in the tail of the bipolar pair driving unknown load(s)....

But how would this low impedance have no detrimental
effect upon the paired emitters? They see only 500 ohms
plus a diode strapped emitter drop in the shared tail.
This current varies with the differential load(s) driven I
would guess?

Is there some voltage feedback from JFET drain to base
that replaces the missing tail impedance for the bipolar
pairs? I am grasping at straws to figure how this tail
works without a more conventional constant current...
 
#46
It's a very tight feedback loop (CM) the FETs force current and there is very high voltage gain at their drains (remember the common mode signal does not see the 2k resistors) and the current sources are driven to establish equilibrium. The same capacitors compensate both loops, differential and common mode.

Think of the action at the FET drains as the same as you see in a simple current mirror but different.
 
#47
i do indeed, but i won't be able to put my hands on it for a couple of weeks (i work 250 miles away from home).

i don't remember seeing anything in there like this, but i'll check the book as soon as i can.

mlloyd1


scott wurcer said:
...
BTW - I think mlloyd1 has a copy of that book (which I never heard of), I would certainly like to see that circuit since I have never seen anything from Krell or ML that looked like this. They seemed to prefer lots of elaborate cascodes.
Click to expand...
 
#51
nikwal said:
Yeah, build it...

I've made and built this below some time ago.. It aint all that bad.. The principle is good and I'm very pleased with the sound..


http://www.diyaudio.com/forums/showthread.php?s=&threadid=130475
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One point was to try the alternative compensation connection (which was actually the initial motivation). I still think any completely symmetrical circuit can use that EC technique on the OS. Did you measure any THD performance? I don't find much advantage THD'wise in a PA application in sim. The IC buffers don't have much voltage transfer error in the line stage application.

"As an additional note you can bootstrap the bottom of C1/C4 ala the 797 and achieve the same output stage distortion removal. This is a little harder to in this case since you need pick off the input-output voltage of the buffer."
 
#53
All sorts of ideas. You can use it with global nfb. Or only Vas nfb, and the ec-ops as-is. Or load the Vas down to lower gain, to make it more insensitive for ops Zin non-linearities, and run the whole shebang open loop (except the ec of course).
Or any combination of lower-gain Vas with *some* global nfb.
This could be an interesting study to look at the trade-offs between distortion, stability and listening impressions...

Jan Didden
 
#54
In my case, the VAS fb is contained within that stage and the EC OPS is not within a gnf loop. Each one of the 4 differential input devices uses source feedback and Miller lag compensation from its corresponding amplifying transistor. The common mode loop is compensated separately. Av is about 5, or 10 bridged. The outputs are within a gnf loop for the DC servo controlled output offset. Fc =~0.3Hz

So many great ideas, so little time to compare.:cannotbe:
 
#55
CBS240 said:
In my case, the VAS fb is contained within that stage and the EC OPS is not within a gnf loop. Each one of the 4 differential input devices uses source feedback and Miller lag compensation from its corresponding amplifying transistor. The common mode loop is compensated separately. Av is about 5, or 10 bridged. The outputs are within a gnf loop for the DC servo controlled output offset. Fc =~0.3Hz

So many great ideas, so little time to compare.:cannotbe:
Click to expand...


Any specific reason for the relatively low Av?

Jan Didden
 
#56
Well, the VAS circuit is driven by a pre-amp circuit so Vin is about 4Vp per phase. The VAS must be driven with a balanced signal in order to get a balanced output and the pre-amp circuit is able to provide a balanced signal from a SE input, SE-BAL conversion with gain. Also to better CL BW. It's fairly fast. The first real construction started out in this thread.

BTW, that veroboard circuit still works perfectly today!😀


I haven't had any time to work with it for a while, been busy doing other stuff, but hopefully I will have some time at the end of the summer.:xeye: Until then, I do enjoy reading about other ideas regarding this concept.🙂
 
#58
scott wurcer said:


No, it's me just trying not to distract with worries about where something first appeared. JC likes the single transistor takeoff from the FET quad and I wanted to explore an alternative. Also as usual I consider all public postings public domain for whatever they're worth one way or the other.


BTW - I think mlloyd1 has a copy of that book (which I never heard of), I would certainly like to see that circuit since I have never seen anything from Krell or ML that looked like this. They seemed to prefer lots of elaborate cascodes.
Click to expand...


Hi Scott,

I checked the book I mentioned. He never mentions Krell. He does say that most of the circuits shown are in the public domain. He seems to only claim the complete amp schematic as his design, and he doesn't use FETs in that.

The book is really not worth finding. It is laid out very poorly, and he tries very hard to not reveal any thing useful. Any thing in that book is available with much better explanation here on this forum. He does state that the gain of the circuit is 20dB.
 
#59
thanks steve. i agree with your assessment. when i first got the book years ago, i was pretty excited. then i read it and was less so. i'll probably be stoned for saying this, but in some ways, Doug Self's book was more educational to me overall.

mlloyd1
now ducking and running for cover ... 😉

Steve Dunlap said:
...
I checked the book I mentioned ... Anything in that book is available with much better explanation here on this forum ...
Click to expand...
 
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