The RESET pin with an overbar above it, as noted in datasheets, may be causing some issues/confusion in a project.
For DACs or ASRCs, should the RESET (overbar) be "high" (TTL, supply voltage).
Bottom line: I want the IC to be "on" and act normally.
For DACs or ASRCs, should the RESET (overbar) be "high" (TTL, supply voltage).
Bottom line: I want the IC to be "on" and act normally.
The bar indicates inverse. So a high would be not in reset while pulling it low would activate reset.
The IC does not appear to be working. Not sure what the cause is?
I have tried both 1 and 0 on RESET. IC still not activating. Not sure if RESET has to held in and release or what???
Sometimes 'RESET' needs to be held low for a period after the PS has stabilized in order to get an IC into operation. So you may find you need a dedicated RESET generator which senses the PS voltage. TL7705 used to be the go-to part but nowadays I use something akin to this : https://www.onsemi.com/pdf/datasheet/max809s-d.pdf
Or read the data sheet for the IC.
Most reset signals I come across are low asserted. So RESET (with over-bar). That could be because all signals start at logic low just before the power is turned off, so by designing reset to be low asserted you ensure that reset is active from the moment the power is turned on. You typically need to hold the reset pin low for some number of clock cycles (or some amount of time) after the power is stable before you let go of it.
Tom
Most reset signals I come across are low asserted. So RESET (with over-bar). That could be because all signals start at logic low just before the power is turned off, so by designing reset to be low asserted you ensure that reset is active from the moment the power is turned on. You typically need to hold the reset pin low for some number of clock cycles (or some amount of time) after the power is stable before you let go of it.
Tom
I still don't get it. How does one get the IC to turn on and do its thing? E.g., apply a 1 (5v) to the RESET (over-bar) pin for n seconds and then 0 (gnd)?
Apply a low voltage until the supplies are up and the crystal oscillator has started and has produced at least a couple of cycles with a decent duty cycle, then make it high. If you are in no hurry, you can simply keep it low for a second or so and then make it high, that should give the supplies, oscillator and internal logic plenty of time to settle and reset.
What about starting it HIGH (1, or with 3.3vdc) "always on" -- i.e., not zeroing it?
I've built the AD1896 twice on green protoboards for SSOP-DIP, using two separate (new) AD1896 chips . Using Amanero USB-i2S adapter. 3.3v is supply voltage.
Both AD1896 device boards exhibit same behavior: no output on I2S out lines.
A bit strange that in all the years of building diy projects with DAC chips and oversampler chips, never encountered a RESET issue. These ASRC devices may be different: all have similar RESET requirements.
E.g.
https://www.ti.com/product/SRC4192
The 4192 has a eval board with extended notes on RESET.
https://www.ti.com/lit/pdf/sbau088
See p. 39:
3.9 Reset Functions
This type of reset functionality is very common in modern ICs.
The datasheet is very clear:
If AD1896 does not work after reset one possible reason is that MCLK is missing.
The datasheet is very clear:
If AD1896 does not work after reset one possible reason is that MCLK is missing.
It is not unusual for ICs to be designed such that there is a good chance that they work correctly when the user doesn't apply a proper reset. No guarantees, though.
If you apply 3.3 V with the chip power supply at 0 V you'll turn on (and probably blow) the ESD protection diodes on the chip.
There are power-on reset (POR) chips out there that will guarantee that the reset is held low for some amount of time after power-up.
I'm curious how you've concluded that you're dealing with a reset issue. No I2S output could be due to incorrect programming of the AD1896, no?
Yeah. Many digital ICs (or analog ICs with lots of digital functionality) feature an internal POR circuit. But unless the power-up state is specified in the data sheet I wouldn't count on it.
Tom
AD1896 does not have a programming interface but some mode pins should be configured either with jumpers or external MCU.
If, in your first sentence above, you're suggesting that AD1896 is damaged because 3.3v was applied to RESET ... and that's why I'm getting no I2S output, this is very unlikely because in BOTH protoboards, I left the RESET pin unconnected for quite while (probing the I2S out lines). And then, after checking other pins and MODE configs, I finally experimented with RESET.
Note what the datasheet says on p17:
I did not "conclude that you're dealing with a reset issue." See my earlier post.
I did just connect a two-way switch to the RESET line (it toggles between gnd and 3.3). No difference.
Yes, it might be some kind of "programming" issue. The AD1896 is hardware programmed -- pins tied to gnd (0 v) or TTL (3.3v).
This Chinese forums shows a config:
http://bbs.hifidiy.net/thread-699696-1-1.html
When the reset pin is open, it could be high, low, halfway, sometimes high and at other times low. At least I didn't see anything about internal pull-ups.
I'm not suggesting that. I am saying that it is possible to blow a chip that way. Not that I think you have done that. It all depends on where the other pins are tied and with what impedance. You're giving very little information about your circuit which makes it hard to help you.
Great. Did you de-bounce the switch?
Best of luck with your project.
Tom