All right! Sent an e-mail to purchase one around christmas, will see when you get to clearing the inbox hehe.
Kind regards
I have so far not seen even one reference to dam2541, does this product even exist?
Soeren,
does the DAM1021 work with stopped bit clock?
For those who are using Ian's FIFO buffer before the DAM1021, do you get sound quality improvement against the standalone DAM1021?
General question: how does the DAM1021 run at first switch on without any software update?
NOS or oversampling?
Is there any filter installed and running?
does the DAM1021 work with stopped bit clock?
For those who are using Ian's FIFO buffer before the DAM1021, do you get sound quality improvement against the standalone DAM1021?
General question: how does the DAM1021 run at first switch on without any software update?
NOS or oversampling?
Is there any filter installed and running?
1) Stopped bit clock means the data are fed at higher speed and then the bit clock is stopped, so that all the bits of a word arrive before the WS latch.
In this way when the DAC switches the bit clock does not run to avoide interference between the two clocks.
For example 32 bit depth at 48 kHz sample rate needs 3.072 MHz continuous bit clock (64 x 48000), while with stopped clock data are fed at 6.144 MHz (double speed) and then the bit clock is stopped.
2) What kind of sound quality improvement with Ian's FIFO (details, stage wideness, location of the instruments and so on)?
3) how can I switch to NOS?
4) what kind of oversampling/filters are running with factory settings?
In this way when the DAC switches the bit clock does not run to avoide interference between the two clocks.
For example 32 bit depth at 48 kHz sample rate needs 3.072 MHz continuous bit clock (64 x 48000), while with stopped clock data are fed at 6.144 MHz (double speed) and then the bit clock is stopped.
2) What kind of sound quality improvement with Ian's FIFO (details, stage wideness, location of the instruments and so on)?
3) how can I switch to NOS?
4) what kind of oversampling/filters are running with factory settings?
# Dont know
# Different 🙂
# Use the terminal and via the CLI, change the filter in use
# Linear (Bank 04): FIR1:x8 + FIR2:x8 = 64x
//
# Different 🙂
# Use the terminal and via the CLI, change the filter in use
# Linear (Bank 04): FIR1:x8 + FIR2:x8 = 64x
//
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Better. But I don't use the Ian fifo now. It was toslink -> fifo (selected NDK) -> toslink... Now I feed my 1121s with a RME Digiface - I prefer the sound with the RME (also using toslink). Its got more body and still better "release" / cleaner.
Yes.
Filter readup: Filter brewing for the Soekris R2R
If you want a decent sounding 4k filter before you end the life of the 1021, shout!
//
Yes.
Filter readup: Filter brewing for the Soekris R2R
If you want a decent sounding 4k filter before you end the life of the 1021, shout!
//
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Manual page 13 say:
Power
Input Voltage (J1)
Power connector, Input voltage
• DC:+/-7to+/-15VDC;preferable9-12VDC
• AC:2x7-8VAC
• Powergoesthoughadiodebridgesopolaritydoesn’tmatter.ConnectorisMTA156type.
Power Consumption
Positive Rail: 0.18A @ 10V
• NegativeRail:0.06A@10V
• Total:2.4W
• The positive supply draw about 3 times as much current as the negative; the current is
almost independent of input voltage.
//
Power
Input Voltage (J1)
Power connector, Input voltage
• DC:+/-7to+/-15VDC;preferable9-12VDC
• AC:2x7-8VAC
• Powergoesthoughadiodebridgesopolaritydoesn’tmatter.ConnectorisMTA156type.
Power Consumption
Positive Rail: 0.18A @ 10V
• NegativeRail:0.06A@10V
• Total:2.4W
• The positive supply draw about 3 times as much current as the negative; the current is
almost independent of input voltage.
//
Sören - when you went to "4k" filters, where all banks incl. FIR2 in fact doubled or what was the actual extension on the whole filter layout? Wa sit only 44,1 that got an extension?
- How many taps may a FIR2 filter assigned?
- I see all the higher rates are assigned less taps than 4k - is there a relation... 4k for 44,1, 2k for 88 etc etc.
- For FIR2, what should "rate" be set to in rePhase?
//
- How many taps may a FIR2 filter assigned?
- I see all the higher rates are assigned less taps than 4k - is there a relation... 4k for 44,1, 2k for 88 etc etc.
- For FIR2, what should "rate" be set to in rePhase?
//
Hi Soeren,
can you please tell me how can I avoid the FPGA to be programmed at startup?
Is the FPGA programmed by the micro so I can just remove the VCXO or cut its power supply in order to avoid the FPGA programmed?
Thank you.
Andrea
can you please tell me how can I avoid the FPGA to be programmed at startup?
Is the FPGA programmed by the micro so I can just remove the VCXO or cut its power supply in order to avoid the FPGA programmed?
Thank you.
Andrea
I shouldn't really waste time on you, but just to stop people ruining their fine dam1021 boards too much, there is a command in uManager that might be useful to for that purpose: "eraseflash". The name says it all.
Thank you for the reply, but just to avoid people ruining their fine dam1021 boards too much, erasing the flash is not an option in order to get the update reversible.
Moreover this would require software directives while the hardware way would be preferred.
So it looks like the simple way would be powering off the on board 3V3 LDO (AZ1117E on my board - end of life).
So the question is: is there any series component to the input of the LDO I can remove to disconnect it from the power rail?
Or else should I remove the LDO?