What do you mean by that.
Does the DAM 1021 not support native DSD, only DOP (DSD over PCM) ?.
Or am I misunderstanding ?.
It does support native DSD as an input format, but it just converts DSD to PCM, it does not play native DSD.
Get some fiber for light, fix one side to the indicator led on the board, and make a small hole in the chassis and glue the other end, flush to the outer side - mechanical solution ;-) ?? It might be to dim in day light maybe...
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Could someone please repeat the available no of taps for the 96 and 192 ksps banks in the latest FW (aka "4k")?
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Take a look of the source file, each time you double the samplerate rate you halve the number of taps, so 88/96K = 2K taps, 176/192 = 1K taps
Cool - thanks!!
How is it that the filters 44 and 48k share filter - is it like that the 48 version could have had a little more BW but that possibility is not utilised - the 48 is in fact using a 44 filter? Is thats what is going on?
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How is it that the filters 44 and 48k share filter - is it like that the 48 version could have had a little more BW but that possibility is not utilised - the 48 is in fact using a 44 filter? Is thats what is going on?
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In the first firmware rev, I only reserved 256 Kbyte in the 1 Mbyte Flash for filters, didn't matter then as the filters started out as 1K filters.
Now with larger filters you have to be careful what you do, a 4K filter is 16 Kbyte, and with seperate filters for all types and all samlerates, you can fill up those 256 Kbyte, and then there is also the DSD filters....
I'm also looking to move to 36 bit or 40 bit filters, so at some time I might reorganize things a little, there is no need to reserve 256Kbyte for the uC, although thery're are available with 256 Kbyte flash, I have never used larger than the 64 Kbyte version.
In next gen boards I will move up to 2 Mbyte flash, mostly to have space for a larger FPGA. But don't hold out for anything soon on the boards, first up is the dac2541, a successor to the dac1541....
Plus the larger the file, the longer time it takes to download....
Now with larger filters you have to be careful what you do, a 4K filter is 16 Kbyte, and with seperate filters for all types and all samlerates, you can fill up those 256 Kbyte, and then there is also the DSD filters....
I'm also looking to move to 36 bit or 40 bit filters, so at some time I might reorganize things a little, there is no need to reserve 256Kbyte for the uC, although thery're are available with 256 Kbyte flash, I have never used larger than the 64 Kbyte version.
In next gen boards I will move up to 2 Mbyte flash, mostly to have space for a larger FPGA. But don't hold out for anything soon on the boards, first up is the dac2541, a successor to the dac1541....
Plus the larger the file, the longer time it takes to download....
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Yes, they share filters, just like most DACs do. I design the 44K filter first, it's the most important one, then the 48K filter will have its cutoff 9% higher...
You're free to design seperate filters, just observe the 256 Kbyte filter file size limit....
You're free to design seperate filters, just observe the 256 Kbyte filter file size limit....
Thanks Sören!
Is it my .skr file that need to be smaller than 256k? Or how do I calculate the size?
Will there be an indication if it is exceeded or does something fail badly?
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Is it my .skr file that need to be smaller than 256k? Or how do I calculate the size?
Will there be an indication if it is exceeded or does something fail badly?
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It's the size of the .skr file. There are no checks and I haven't tested it, but if larger it will overwrite the uC firmware in flash, which don't really matter that much as it's only really used when updating....
Hi all, I'm slowly building a dam1021 dac and for now I'm working on the power supply. I just finished the Reflektor-D shunt reg that will feed the I2S isolated input at 3.3v. Or at least it should do it. The problem is that it outputs 3.2v instead of 3.3. Do you think it could be a real issue?
Many thanks,
Gaetano.
Many thanks,
Gaetano.