Drastically different results are to be expected as you are removing the reservoir cap; your results are not as drastically different as I would expect. With 100R I would expect to see a full-wave rectified sine, not a normal ripple waveform.
It may be that you are outside PSUD2's capability. It is not a general circuit simulator like Spice, so it may make assumptions in its models which you are violating with such a large ESR and zero ohm R in the CR sections.
That's not my reading- the main reservoir caps (10mF) remain, the 100u cap is nearly nonfunctional. The voltage output when he goes to zero ohm series resistors shows zero ripple and only about 1 volt of output. The fact that he loses it in two stages suggests that the sim is being abused, thus my suggestion of putting in small but finite series resistances.
OK. It seems the PSUD2 cap model assumes that ESR is realistic. You could try emailing Duncan to discover what the limit is for this. Some supplies with big chokes might want to add a snubber to damp LF ringing but this won't be possible if PSUD2 can't handle it sensibly.
So this one, for instance, hits pico noise. I have got into low femto messing with the numbers on a different try.
Anyway,aside from these extreme examples, is there any truth to the results, for instance when a cap has 1R ESR because even that value could be achieved with junk caps or a resistor in series with the cap?