Ticking through the speakers? Or physical ticking of the device when you have the volume off?
Through the speakers I guess, but very low and not audible when songs are playing. This is what previous owner said, I haven't recieved it yet.
Hello Mayday!
Good to see your experiment with your player.
I have a cd-40 that modified a half year ago. It's just sound incredible good.
Now I listen with an Infinity Qa speaker with EMIT tweeter, just superb detailed and transparent with a lots of air.
Super in every way.
Never go back for normal speaker that for sure.
I read ecdesign's treat all over and tried some of his circuit.
You should try the reg for the 1541 its cheap to build and worth a lot!! clean power very important!
there is an easy way of DEM sync with the WS signal. used with the I2S attenuator.
The wima caps not the best solution and after the I2S att. is not needed at all.
Here is a part from the DEM clock from ecdeign:
"The DEM clock needs to have low jitter and induce lowest possible crosstalk. The problem is that the DEM clock needs to be injected in an on-chip oscillator that must not be allowed to oscillate.
The DEM clock has direct effect on the bit errors of the 6 MSBs in the TDA1541A, and on-chip crosstalk (inter modulation between DEM clock and other on-chip clocks) thats why there are clearly audible differences between DEM clock circuits.
I noticed that the indicated 200KHz DEM clock causes a number of issues like problems with active divider settling time, crosstalk with on-chip clock signals, ground-bounce, and problems with external decoupling film caps (inductance).
Other problems are the extra divider and inverter required to derive the DEM clocks that add jitter (every logic element adds jitter). The DEM clock distribution among multiple TDA1541A chips is also problematic.
So I tried to design a simple but highly effective DEM clock injection circuit that uses one of the local I2S signals.
After some experimenting I decided to use the WS signal (44.1 KHz). Decoupling cap value can be increased to approx. 400nF (390nF) in order to achieve similar filter characteristics although 100nF worked fine too.
WS was connected to the anode of a Schottky diode, the cathode was connected to a resistor of exactly 13K, and the resistor was connected to pin 16. Pin 17 was left unconnected.
The value of 13K corresponds with a WS signal amplitude of exactly 3.3V (SD-transport I2S output level). The value needs to be increased to 14 ... 15K when when using 5V signal level. The value of the resistor is critical, too high tolerance will prevent the on-chip DEM clock from tracking. This method uses current steering, so the current deviations must be tuned in such way that the DEM oscillator tracks reliably."
I hope you find it useful. I know its a long way to achieve our goal.
Good to see your experiment with your player.
I have a cd-40 that modified a half year ago. It's just sound incredible good.
Now I listen with an Infinity Qa speaker with EMIT tweeter, just superb detailed and transparent with a lots of air.
Super in every way.
Never go back for normal speaker that for sure.
I read ecdesign's treat all over and tried some of his circuit.
You should try the reg for the 1541 its cheap to build and worth a lot!! clean power very important!
there is an easy way of DEM sync with the WS signal. used with the I2S attenuator.
The wima caps not the best solution and after the I2S att. is not needed at all.
Here is a part from the DEM clock from ecdeign:
"The DEM clock needs to have low jitter and induce lowest possible crosstalk. The problem is that the DEM clock needs to be injected in an on-chip oscillator that must not be allowed to oscillate.
The DEM clock has direct effect on the bit errors of the 6 MSBs in the TDA1541A, and on-chip crosstalk (inter modulation between DEM clock and other on-chip clocks) thats why there are clearly audible differences between DEM clock circuits.
I noticed that the indicated 200KHz DEM clock causes a number of issues like problems with active divider settling time, crosstalk with on-chip clock signals, ground-bounce, and problems with external decoupling film caps (inductance).
Other problems are the extra divider and inverter required to derive the DEM clocks that add jitter (every logic element adds jitter). The DEM clock distribution among multiple TDA1541A chips is also problematic.
So I tried to design a simple but highly effective DEM clock injection circuit that uses one of the local I2S signals.
After some experimenting I decided to use the WS signal (44.1 KHz). Decoupling cap value can be increased to approx. 400nF (390nF) in order to achieve similar filter characteristics although 100nF worked fine too.
WS was connected to the anode of a Schottky diode, the cathode was connected to a resistor of exactly 13K, and the resistor was connected to pin 16. Pin 17 was left unconnected.
The value of 13K corresponds with a WS signal amplitude of exactly 3.3V (SD-transport I2S output level). The value needs to be increased to 14 ... 15K when when using 5V signal level. The value of the resistor is critical, too high tolerance will prevent the on-chip DEM clock from tracking. This method uses current steering, so the current deviations must be tuned in such way that the DEM oscillator tracks reliably."
I hope you find it useful. I know its a long way to achieve our goal.
Attachments
the led-regulator above is for the TDA. the 7220 needs more mA. this led-reg more superior to any kind of superreg around her on the forum.
build it, test it and you will hear a difference.
i didn't do anything with clock yet. Only disabled the oversampling and use the 7220 for the clock with clean PS.
OK. You can try,but I think this circuit only good around 100mA, 7220 needs more.
there is one more thing that improves the PS a lot is the 3 stepped regulator, very simple.
I dig up the circuit and will post it.
Can you explain why this reg shouldn't be able to handle more than 100mA? yes, typical for SAA7220 is 180mA.
Edit: maybe you ment the one from schematics you posted? The one above is the one I've built.
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That's intresting, could you explain the circuit? Thanks!
What part of that schematic could be used before the TPR?
The TPR needs >11Vdc.
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Btw, our Dobermann is imported from Hungary
I've been there once when I was about 13.
Nice dog you got!! Love dobermanns.
I did build this 6 mounts ago, since then I just keep listening.
I try to find some simple explanation, what it does and how to build.
I'm beginner but could build it at first time.
when you have a lots of time start reading ecdesigns treat. worth it.
Thanks!!
Here he is at 3 years old(this summer)
I'll read that when I feel concentrated and have the time.
Beautiful dobermann!!!
I got so money documents... I did saved from the thread, that was almost 300 pages,ahhh
I find another pic from the circuit, tried to highlight the main point.
I hope that easier to understand. of course you only need one side for 7220.
for you 2x9V transformator should work, thats what i had. I will check mine circuit.
For me Goran made a PCB that fits in the side of the player.
the thread is here somewhere, marantz cd40 or so.
from ecdesign:
"I started by using the new Floating CT power supply, this interrupts both GND and power supply connections, creating a true "floating" power supply, reducing the effect of ground loops.
In order to reduce ripple voltage, the floating CT supply is followed by a capacitance multiplier, emulating approx. 750,000uF."
I got so money documents... I did saved from the thread, that was almost 300 pages,ahhh
I find another pic from the circuit, tried to highlight the main point.
I hope that easier to understand. of course you only need one side for 7220.
for you 2x9V transformator should work, thats what i had. I will check mine circuit.
For me Goran made a PCB that fits in the side of the player.
the thread is here somewhere, marantz cd40 or so.
from ecdesign:
"I started by using the new Floating CT power supply, this interrupts both GND and power supply connections, creating a true "floating" power supply, reducing the effect of ground loops.
In order to reduce ripple voltage, the floating CT supply is followed by a capacitance multiplier, emulating approx. 750,000uF."
Attachments
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