^ Not the best circuit, IMHO, as it doesn't keep DAC output pins at constant voltage, which is required for optimum performance.
Extending one single opamp differential filter to super-balanced might be a better option and functionally equivalent to the CM-servo circuit in that it keeps output CM at zero, basic idea here: https://www.audiosciencereview.com/...das-tone-board-v1-3.30136/page-8#post-1077451
Extending one single opamp differential filter to super-balanced might be a better option and functionally equivalent to the CM-servo circuit in that it keeps output CM at zero, basic idea here: https://www.audiosciencereview.com/...das-tone-board-v1-3.30136/page-8#post-1077451
You probably misunderstood me, this is intended for AFTER the I/V. If you're up for it I could drop you a PM explaining in more detail what we're up to, maybe even a phone call...You're one of the very few (the only?) non commercial experts on this topic...
What Topping did after the I/V with D90 was atypical, although it was to an extent similar to what AKM did with their eval board. Chief design engineer at Allo and I had conversations about differential summing and balanced MFB filter stage's response to remaining EMI/RFI after the I/V stage. We independently came to similar conclusions. What Topping did with D90 made a lot of sense in that context.
Sketched up a schematic. Ran across it recently among some papers but would have to find it again. From memory they did what AKM did which was I/V -> differential RC filter -> common mode RC filters to ground -> duck to internal layer of pcb (maybe a little free RF filtering), then back to top layer -> differential summing of output phases and pairs of channels (1&3, 2&4 ?) (but without any caps for additional filtering) to produce XLR outputs -> differential summing of XLR outputs to produce SE outputs.
Also, Topping differential summing opamps were LME49720.
The differential summing of phases and channels was a little weird which is why finding the schematic would be good. IIRC AK4499 allowed register setting of output channel assignments and the option to invert them. Occurred to me that capability could be used to further cancel out some distortions and or noise.
For one example, with a fancy scope and triggering off the dac clock it was possible to visualize clock signals at 2 x BCLK frequency at I/V output of about 300mV PP. Normally those waveforms would be buried in noise, but the scope allowed 'dot' averaging (as opposed to sweep averaging) to attenuate noise. Thought of a way to possibly cancel out the clock noise but did not get around to testing it.
Found that conducted clock noise could propagate all the way out through the dac outputs and then all the way to the headphone jack of a Neurochrome HP-1 set to maximum gain. Various tests were done to verify if clock signal was actually passing through the HPA itself rather than appearing via ground noise or some other stray coupling mechanism. Among other things the HPA volume control could change the clock waveform amplitude.
Anyway, that's as much as comes to mind at the moment. IMHO presumably topping left out the MFB filtering function to ease requirements on the differential summing opamps.
Also, Topping differential summing opamps were LME49720.
The differential summing of phases and channels was a little weird which is why finding the schematic would be good. IIRC AK4499 allowed register setting of output channel assignments and the option to invert them. Occurred to me that capability could be used to further cancel out some distortions and or noise.
For one example, with a fancy scope and triggering off the dac clock it was possible to visualize clock signals at 2 x BCLK frequency at I/V output of about 300mV PP. Normally those waveforms would be buried in noise, but the scope allowed 'dot' averaging (as opposed to sweep averaging) to attenuate noise. Thought of a way to possibly cancel out the clock noise but did not get around to testing it.
Found that conducted clock noise could propagate all the way out through the dac outputs and then all the way to the headphone jack of a Neurochrome HP-1 set to maximum gain. Various tests were done to verify if clock signal was actually passing through the HPA itself rather than appearing via ground noise or some other stray coupling mechanism. Among other things the HPA volume control could change the clock waveform amplitude.
Anyway, that's as much as comes to mind at the moment. IMHO presumably topping left out the MFB filtering function to ease requirements on the differential summing opamps.
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Sketched it up when when examining the dac board. Its around here somewhere. Will post when found.
I think the passive deglitching filter (both DM and CM) is absolutely essential as is perfect PCB layout (I wouldn't use anything less than 6 layers), power supply strategy etc. Full ack @Markw4, with the harmonics of the glitches reaching out to GHz territory it's not so easy to really get the RF down (and stop if from being demodulated, etc). All the current loops must be really kept short and small area when we still want to successfully apply lumped analysis and design strategies.
FWIW, in the low-cost Topping D10b there is two single-ended "classic" (as per their own app-note) I/V's with fixed bias (thus with some remaining CM offset), followed by RC filters, CM and DM. No actual subtractor/rebalancer stage, so only good specs when used balanced. Good enough for the product but certainly not the best one can do with ES9038q2m.
Much depends on the required bandwidth. I personally see no need of higher corner frequency (-0.1dB) than 20kHz for the analog filter even with higher sample rates.
And, as @bohrok2610 has shown, using the lowest possible master clock in master mode also helps to reduce glitch energy, maybe at the cost of noise shaping kicking in earlier (??).
FWIW, in the low-cost Topping D10b there is two single-ended "classic" (as per their own app-note) I/V's with fixed bias (thus with some remaining CM offset), followed by RC filters, CM and DM. No actual subtractor/rebalancer stage, so only good specs when used balanced. Good enough for the product but certainly not the best one can do with ES9038q2m.
Much depends on the required bandwidth. I personally see no need of higher corner frequency (-0.1dB) than 20kHz for the analog filter even with higher sample rates.
And, as @bohrok2610 has shown, using the lowest possible master clock in master mode also helps to reduce glitch energy, maybe at the cost of noise shaping kicking in earlier (??).
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Hello,
For a stereo dac when 4 outputs are tied togheter to form one output channel, is this correct?
I don't use XLR, only RCA output.
BR// Daniel
For a stereo dac when 4 outputs are tied togheter to form one output channel, is this correct?
I don't use XLR, only RCA output.
BR// Daniel
Thanks for the answers and help.
My plan is to try the 9039PRO chip.
New try of the schematic...
BR// Daniel
My plan is to try the 9039PRO chip.
New try of the schematic...
BR// Daniel
According to simulations your ver.2 schematic will oscillate. To make it stable C18, R14, R15 should be scaled in the opposite direction while R17, R18 remain as in original. Also based on simulations in the original schematic R14 and R15 seem too low and actually increase distortions. So I would try these: C18=330p, R14=R15=47k. It is not possible to simulate the exact behaviour of ES9039PRO outputs but anyhow in simulations the positive feedback or C18 does not bring benefits so C18, R14, R15 could also be removed.
ES9039Q2M datasheet has yet another I/V stage. I assume Note 2 refers to the I/V stage in OP.
ES9039Q2M datasheet has yet another I/V stage. I assume Note 2 refers to the I/V stage in OP.
Ok, thanks.
I tought that the schematic in the datasheet for 9039 pro was for one channel (of 8).
And if you should use 4 outputs to make one channel in stereo you have to scale it like i did in ver.2.
But maybe that's incorrect?
BR// Daniel
I tought that the schematic in the datasheet for 9039 pro was for one channel (of 8).
And if you should use 4 outputs to make one channel in stereo you have to scale it like i did in ver.2.
But maybe that's incorrect?
BR// Daniel
Scaling the negative feedback resistor and capacitor is relatively straightforward. But the impact of positive feedback resistors and deglitching capacitor is not so clear as these are not commonly found in DAC I/V stages (or any opamp stages). Also not much is known about ES9039PRO output. Most probably positive feedback resistors and deglitching cap need to be tuned in actual circuit.
So unless you have proper tools for measuring THD(+N) my recommendation is to use normal opamp I/V or at least leave the positive feedback resistors and deglitching cap out.
So unless you have proper tools for measuring THD(+N) my recommendation is to use normal opamp I/V or at least leave the positive feedback resistors and deglitching cap out.
FWIW, here is my humble experience on this. This "deglitching" cap may be unusual in DAC outputs but seems pretty standard in ADC inputs. There, the challenge is to shape the phase margin of the opamps driving this cap so they won't get fried. C64/68 should be optimized for the given opamp and once this is done, opamp rolling is not an option. Have a look here:
https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&cad=rja&uact=8&ved=2ahUKEwjtkrSG1aT-AhUabPEDHdyADnAQFnoECAkQAQ&url=https://www.analog.com/en/analog-dialogue/articles/ask-the-applications-engineer-25.html&usg=AOvVaw3tQMJY0uANRRSeEPcVNO0A
https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&cad=rja&uact=8&ved=2ahUKEwjtkrSG1aT-AhUabPEDHdyADnAQFnoECAkQAQ&url=https://www.analog.com/en/analog-dialogue/articles/ask-the-applications-engineer-25.html&usg=AOvVaw3tQMJY0uANRRSeEPcVNO0A
Yes, ADC inputs typically have similar "deglitching" cap as ADC causes current surges as it charges the sampling capacitor. The deglitching cap is usually part of a LP filter to isolate the current surges from the opamp output. At DAC I/V input it may serve similar purpose but its usefullness is not so clear as in ADC inputs. And the sizing of this deglitching cap is not straightforward.
Here is an article related to ADC inputs:
https://www.analog.com/en/technical-articles/ltspice-simulating-sar-adc-analog-inputs.html
Here is an article related to ADC inputs:
https://www.analog.com/en/technical-articles/ltspice-simulating-sar-adc-analog-inputs.html
According to post #1, C18 is part of a circuit that is recommended in the datasheet, and on top of that, it is perfectly logical that trying to keep high frequency quantization noise out of an active circuit reduces the active circuit's ability to produce intermodulation products in the audio band. I would keep C18 in the circuit unless there were a very good reason not to.
Trying to understand this a little better, I have a question to ask. Let aside the circuit in discussion here and assume a typical LC passive low pass filter connected to the current output of the DAC before the I/V stage. Does this work? Filter current before convert to voltage? Or seen from the other side, does filtering quantization noise on the same active I/V loop relaxes slew rate?
If You have time please try "Superbal" or "super balanced" configuration OP at the end for bal-to-se output?
I tried and I am almost sure that much better sounding than classic...
fig 12 from
http://www.douglas-self.com/ampins/balanced/balanced.htm
and
fig 10 from
https://sound-au.com/articles/balanced-io.htm
.
something like this
.
(maybe some caps parallel with FB resistors of booth OP will help?)
.
cheers