Generally speaking,Imo Mounting holes with no connectivity do not need to be on a schematic. A heatsink with no connectivity can be added to a schematic if you want it to be included in the BOM however. Sometimes how mechanical parts are used depends on your design process
On the subject of tear dropping, I had used this many years ago with allegro, I found snowballing was a better way of doing it vs tear dropping.
On the subject of tear dropping, I had used this many years ago with allegro, I found snowballing was a better way of doing it vs tear dropping.
Most of us put mounting holes on the schematic, it can make it easy to show that they are attached to Gnd
I used to leave unconnected mounting holes out of the schematic, but it does make it more likely for a mistake to happen related to them, and it can also be useful to see exactly how many mounting holes you have. If you didn't want them to show up on printed versions, you can place them outside the border and if you plot the page they won't appear.
Realized that if you grab (default hotkey G) a curved section of a track you can drag adjust the radius. It doesn't give DRC warnings like Grab does with straight tracks, but it's way better than the amount of time spent on entering approximate radii, undoing, trying again, undoing, trying again, accepting something close enough.
On my Mac, copying and pasting between windows is also way better. I used to have to open eeschema, copy something, keep it open and open a new eeschema file to paste into. If I closed eeschema or tried to paste into a project file, it wouldn't work.
Speaking of unconnected mounting holes, I do keep running into a DRC error with those: I had a NPTH mounting hole footprint with a copper ring on the top and bottom layer (just a drawn circle on those layers) connected by four vias. The vias were just via-sized PTH in the footprint with no number. DRC always gives me an error because the via is overlapping the copper ring. Anyone know how to do that without the DRC flag? It would give me 8 errors per pad, so at minimum I'd have to ignore 36 errors to use this kind of mounting hole, which I like for superficial reasons.
Realized that if you grab (default hotkey G) a curved section of a track you can drag adjust the radius. It doesn't give DRC warnings like Grab does with straight tracks, but it's way better than the amount of time spent on entering approximate radii, undoing, trying again, undoing, trying again, accepting something close enough.
On my Mac, copying and pasting between windows is also way better. I used to have to open eeschema, copy something, keep it open and open a new eeschema file to paste into. If I closed eeschema or tried to paste into a project file, it wouldn't work.
Speaking of unconnected mounting holes, I do keep running into a DRC error with those: I had a NPTH mounting hole footprint with a copper ring on the top and bottom layer (just a drawn circle on those layers) connected by four vias. The vias were just via-sized PTH in the footprint with no number. DRC always gives me an error because the via is overlapping the copper ring. Anyone know how to do that without the DRC flag? It would give me 8 errors per pad, so at minimum I'd have to ignore 36 errors to use this kind of mounting hole, which I like for superficial reasons.
Thank you, that's an excellent idea. Just the other day I learned the new way to make a custom pad.
I would always put them on the schematic too.
Otherwise schematic no longer matches pcb and should be flagged as an error.
Actually they do, and the reason is that if you add them in the PCB design, the next time you update the netlist they will be removed from your PCB design.
I've used KiCad for about 8 years now and previously used OrCad and Altium and this was true for them as well. I'm a big fan of KiCad in case there is any question.
I group mounting holes and heat sinks in a convenient spot on the schematic to keep them out of the way.
Hi
I can not comment on the use of kicad since I have never used it. but I do use orcad 16 layout all the time and can verify that what you say about a forward eco removing a mounting hole is incorrect. You have to set the layout part property to “not in netlist” for it to be retained in layout and unaffected by a forward eco or “netlist” op from capture to layout.
Think about this situation, you have design that uses a standard pcb outline having tooling and mounting holes that have no connectivity. They could be a footprint or geometry that is reused in multiple designs. It would a royal pita to have to recreate that for every design which uses that pcb outline.
The only reasons for mech bits to be in the schematic is for connectivity and a BOM. If either of those two do not apply then it makes no sense to me.
I can not comment on the use of kicad since I have never used it. but I do use orcad 16 layout all the time and can verify that what you say about a forward eco removing a mounting hole is incorrect. You have to set the layout part property to “not in netlist” for it to be retained in layout and unaffected by a forward eco or “netlist” op from capture to layout.
Think about this situation, you have design that uses a standard pcb outline having tooling and mounting holes that have no connectivity. They could be a footprint or geometry that is reused in multiple designs. It would a royal pita to have to recreate that for every design which uses that pcb outline.
The only reasons for mech bits to be in the schematic is for connectivity and a BOM. If either of those two do not apply then it makes no sense to me.
My last experience was with OrCad 14 and I did not get far enough with it to know the score there. It seems to be (have been?) a fairly common practice, that said none of the suppliers I deal with currently do it, but in previous jobs it was fairly common.
Which version are you using, I use 6.0.5 and cannot see the "exempt from courtyard requirement" here. It would certainly be a useful option to have. Up to now I always removed courtyard lines from the footprint that needed to overlap with another footprrint.
I used to use nightly builds until one day a whole bunch of features I had been using and appreciating suddenly stopped working. This was a few years ago and prior to the 6.00 release. I reverted to the previous version I was using. I've learned not to do an upgrade while working on a new layout.
I thought I had jumped to 6.0 but apparently not since I just checked and I am still running 5.1.10 - 1 I guess since I am not currently doing a layout I can experiment with upgrading.
(Duh.) 🤣
I thought I had jumped to 6.0 but apparently not since I just checked and I am still running 5.1.10 - 1 I guess since I am not currently doing a layout I can experiment with upgrading.
(Duh.) 🤣
On Windows you can have both 5.1.x and 6.0.y installed.
Copy V5 projects over to a new folder, as openng a V5 one in V6 updates the schematic and pcb files permanently
Copy V5 projects over to a new folder, as openng a V5 one in V6 updates the schematic and pcb files permanently
Yes, I noticed the installation paths are different and the old version still works. I will probably move to the newest tools once I am sure that the updated files work as expected. I'm in a good place to do that since I currently have no active projects. The new tool sets look interesting.
I use the equivalent feature in diptrace and it works pretty well. quite a time saver.