traderbam said:
It operates by subtractive neutralization not feedback. The displacement current in Cc is the compensation signal 90 degrees out of phase and increasing with frequency plus the current which is the derivative of the crossover distortion. An easy way to see how crossover distortion goes up with frequency. The displacement current in Cn is just the derivative of the crossover part. So by subtracting them in the current mirror you still have the same compensation but "no" crossover distortion. There is a vector error leaving a small residual.
Oh, I see. <wryly>
Let me come back to this.
Meanwhile, I would just like to clarify something. In Figs 31 and 32, Cn and Cc are shown as part of the chip schematic. But now that I have read further down to Fig 44, it looks like Cn is an optional, external capacitor. I'm guessing Cc is the internal, fixed, compensation cap and Cn is something the user can add if they want to, and that pin 8 is actually equivalent to node A in Fig 31. Is that right?
Brian
Wavebourn said:
No that uses feedback, had the same argument at the AES and gave up. Literally the extra capacitor is the only added component.
traderbam said:
Yes, the cap is optional and could be trimmed for a deep null
Yes, I have known that ability in some fets for many years. That is the main reason they are perfect as switches in resistor based volume controls.
Actually, it`s a pretty nifty scheme.
If you check the outline of some of Toshibas old dual houses, like 2SK240, you will se that the terminals, pairwise, seem to be right opposite each other, whereas when they are singles, they are not. I don`t believe Toshiba made some singels with the terminals flipped, just to put them in a dual housing. They must also have been aware of the possibility to flip D and S.
regards
Roar
Actually, it`s a pretty nifty scheme.
If you check the outline of some of Toshibas old dual houses, like 2SK240, you will se that the terminals, pairwise, seem to be right opposite each other, whereas when they are singles, they are not. I don`t believe Toshiba made some singels with the terminals flipped, just to put them in a dual housing. They must also have been aware of the possibility to flip D and S.
regards
Roar
Wavebourn said:
The resistor generalizes to the case of DC error which in all practical cases is insignificant. You're entitled to your wrong opinion, write out the general simplified transfer function for each case and see.
The same as manufacturers of some switching BGTs were aware of such possibility when they designed symmetrical transistors that had almost the same breakdown base-collector and base-emitter voltages.
scott wurcer said:
Quad's practical amp had a capacitance as well. Cbe in output transistors. Scott, I don't blame on you for using something patented. I blame on those who grant patents on obvious things.
I think we are in trouble, Scott. Using 50KHz and 50MHz (more realistic worst case) and a gain of 30, you compute it.
Bear with me here, Scott. Just wanna make sure I am on the same page as you before the fun starts. There is something wrong and I cannot see it. Attached is my derivation for the gain equation for Fig 32. I seem to have made a mistake because I get the Cn term in the denominator the opposite sign to the datasheet.
Ok, I got it. Misconstrued the sign of the mirror. I'll repost in a mo...
edit: then again...if Cn=0 then Vout/Vin is negative in the datasheet. Hmm.
edit: then again...if Cn=0 then Vout/Vin is negative in the datasheet. Hmm.
Wavebourn said:
With a 600 Ohm load neither matter much. A could be exactly 1 and have "0" output impedance but have a nonlinear transfer function and the result is the same. A is just triple EF. There is not a second amplifier. Quad patent shows the dumping amplifier connected class C though I don't think it actually is in practice, but don't know for sure. I never saw the patent BTW and always considered the Quad amp just another way to make a composite amplifier also "obvious" BTW. I need to be "on my own time" for a more elaborate answer.
scott wurcer said:
Variable "A" in that equation means it is below 1 and is not a constant (depends on frequency, current, voltage). However it may be viewed as a positive feedback, and if to add a load capacitance in that equations you may get a negative input resistance on some frequencies, but feed-forward would dominate as you intended.
Here is an example of an oscillator that uses similar approach:
Speaking of the patent, in my mind it does not matter is an output stage in class C or class AB, anyway the result is linearization due to feed-forward from fast clean class A driver. I did similar thing in 1970'th, but did not know that it was patented using fancy explanations.
Do you mean the sign of i is wrong in eq.2? That doesn't seem to lead to the datasheet equation when I try it.syn08 said:
I'm struggling because when I stare at eq.2 it seems to make sense. Ve is in phase with Vin. The current i is out of phase...so it degenerates the gain as I would expect of a correction signal. Also, my eq.4 gives a positive gain when Cn=0 whereas the equation in the datasheet gives a negative gain value - curiously.
traderbam said:
Also, my eq.4 gives a positive gain when Cn=0 whereas the equation in the datasheet gives a negative gain value - curiously.
Anti-pirate datasheet? 😎
Aaaaarrrr...! Yo ho ho and a bottle of rum.
Johnloudb said:
yup,both eyes and ears.
quite often, 'hearing loss' is just a bad habit
reverseable by retraining.
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