John Curl's Blowtorch preamplifier

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#16,802
PMA said:


Do not give up. SE tubes are NEVER able to play great orchestra well. But customer's taste is often unrefined. Do not cringe to them.
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What?

Unmeasurable distortions on low power does not necessary mean high IMD level on full power. Everything depends on design, both for tubes and for transistors. Tubes don't care what frequencies how to distort, it is the big advantage, however. But despite of imaginable easiness design with tubes is not so simple. However, you may select a poor sample of tube design that got good magazine reviews to get happy comparisons, but speaking of ultimate sound reproduction I have to admit that John Curl is right, it is hard to compete. Including reproduction of great orchestra records.
 
#16,805
janneman said:
/OT for Scott:

AES Munich, next month:

T8 - Microphone History

Chair:
Jörg Wuttke, Schoeps, Technical Director Emeritus
Presenters:
Ulrich Apel, Microtech Gefell GmbH
Sean Davies, S.W. Davies
Stephan Peus, Neumann GmbH

Abstract:
This tutorial will be presented in 3 parts.



Wouldn't you want to be there? (And yes John, you knew all of this 135 years ago. We know 😉 ).

Jan Didden
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Looks good, wish I had an excuse. In better times I would go on my own coin.
 
#16,806
PLEASE everyone, op-amp macro models are a straw man (a lame one at that) to attack SPICE simulation. They are deliberate gross approximations using mainly controlled sources just to get a behavioral feel for basic operation. Serious customers can now get encrypted full top level circuit files in HSPICE/MEXTRAM format. They are surprisingly good at simulating real performance.
 
#16,807
G.Kleinschmidt said:




I have to admit to being confused now because your experimental results have resulted in rather different conclusions to mine.

As far as the VAS common mode current that flows in a fully symmetrical design goes, as far as I can see, the value imbalance between the Miller compensation capacitors is a relatively minor issue (in some cases).

To illustrate the point I’ve attached a screen shot of a basic sim to this post.
The red trace is the output voltage (at 20kHz) and the green and blue traces are the PNP and NPN VAS transistor emitter currents respectively.

The VAS idle current is 10mA and there is about double the AC voltage swing in one VAS transistor than the other due to one Miller cap being 100pF and the other 150pF.

This is a significant imbalance, still, however neither VAS transistor comes close to being cut off.

It probably should also be noted that a common mode signal current that flows in a symmetrical VAS can be induced by any gain imbalance between the positive and negative halves of the circuit and is not strictly a Miller capacitor tolerance issue (Using an alternative compensation scheme just removes one source of error).

This will possibly cause a stink, but IMHO jfets are not desirable devices for the input stage (LTP’s) of fully symmetrical topologies because of this.

The gm imbalance between obtainable N and P channel parts is too great. With bipolar transistors you have scope for linearization with emitter degeneration, which essentially makes gm independent of device parameters (within reason).

Cheers,
Glen
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Hi Glen,

You are largely correct, and I did go back and check some of my simulations last night. I have good news and bad news. First, the bad news is that the effect I described is very real. The good news is that I observed it in what I consider to be a bit of an extreme case, in terms of very high impedance at the input node of the two VASs. This matters a lot, because the output impedance due to the shunt feedback from the Miller capacitor depends largely on the voltage divder ratio it sees between the impedance of the Miller capacitor and the other node impedance on the VAS input node. The lower the impedance on the VAS input node, the less is this effect. In the design I quoted last night, that node impedance was on the order of 50-100k. I have since simulated with a more realistic impedance of 5-10k, and the effect is reduced, but still see-able.

One thing to look at is the VAS emitter degeneration resistor signal current with the Miller caps perfectly matched, and then with them at +/- 20 %. If you see increase VAS signal current as a result of the mismatch, you are seeing the effect. If/when this current gets big enough, the VAS transistor can go into cutoff. I'll try to post a sim when I get a chance.

This effect is also brought on by gm mismatch in the P/N differential pairs, and that is why I agree with you that complementary JFETs are not a good choice for this topology in designs that are susceptible to the effect I describe. Again, I don't think the JC1 is susceptible to this concern.

Cheers,
Bob
 
#16,809
john curl said:
Whatever approach we chose, I think that 7th harmonic is the most important distortion to reduce to virtually unmeasurable, if possible.
A strictly differential fet pair should be more linear than a bipolar pair, but there should be an advantage in the H bridge configuration as it does not allow the S curve to bend over, as the complement takes over to supply the current path. This should reduce higher order odd distortion at higher modulation levels.
Source or emitter degeneration is problematic, in my opinion, if only for the added input noise. However, I know that PMA has done an excellent job with his input stage, even though I would not elect to do it that way.
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Hi John,

I agree with you pretty strongly that we need to really keep our eye on 7th order distortion. Second and even third is not as much of a problem, but we often don't have to sacrifice much to get it low anyway. I think that it may be a legitimate area of controversy as to whether or not the prsence of second order, for example masks or makes more tolerable a given amount of 7th.

For example, amp A has 2nd at -70dB and 7th at -90 dB. Amp B has 2nd at -90 dB and 7th at -95 dB. Which one would be more likely to sound better?

Whether the amplifier has feedback or not, looking at the absolute amount of 7th sounds like a reasonable piece of the puzzle.

At the same time, I just like JFETs at the input of an amplifier and know that I will pay a small price in low-order distortion for using them. Using signal-driven cascodes on them can greatly reduce this small penalty.

Cheers,
Bob
 
#16,812
scott wurcer said:
PLEASE everyone, op-amp macro models are a straw man (a lame one at that) to attack SPICE simulation. They are deliberate gross approximations using mainly controlled sources just to get a behavioral feel for basic operation. Serious customers can now get encrypted full top level circuit files in HSPICE/MEXTRAM format. They are surprisingly good at simulating real performance.
Click to expand...

We all know that.
 
#16,814
scott wurcer said:
PLEASE everyone, op-amp macro models are a straw man (a lame one at that) to attack SPICE simulation. They are deliberate gross approximations using mainly controlled sources just to get a behavioral feel for basic operation. Serious customers can now get encrypted full top level circuit files in HSPICE/MEXTRAM format. They are surprisingly good at simulating real performance.
Click to expand...

Hmm... encrypted. Does that mean it's difficult to convert these models to Spice, LTSpice or MicroCap formats?

Cheers,
Edmond.
 
#16,815
Wavebourn said:


That link even did not touch geometry/density complexities.
Now please show me that speed related complexities of charge carriers in tubes, to compare.
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With all due respect Sir, you don't seem to have a clue on what you are talking about.

FIY, the fact that the collision term in the Boltzmann transport equation is different for conduction in solids and vacuum has nothing to do with distortions, frequency, etc... It has to do with noise, but this is another kettle of fish.
 
#16,816
syn08 said:


With all due respect Sir, you don't seem to have a clue on what you are talking about.

FIY, the fact that the collision term in the Boltzmann transport equation is different for conduction in solids and vacuum has nothing to do with distortions, frequency, etc... It has to do with noise, but this is another kettle of fish.
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With all due respect, Sir, I have to point you back to the link that clearly illustrates complexity of speed related issues in semiconductors. You can always add and mix distortions for your taste and analyze what happen to them on different frequencies.

Edit: closer to the discussion, Miller capacitance in transistors is not a capacitance actually.
 
#16,817
Some of the ideas that arise here are presented in a pretty intangible way and are difficult to interpret and so they are of limited usefulness. It feels worthwhile to explore theories when there is something solid behind the facade to grab hold of. A little frustrating, otherwise.
 
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