John Curl's Blowtorch preamplifier part II

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Also, you circuit guys..I'm using a common base to turn the p fet on, with maybe a 100 ohm resistor to turn it off, and pulling the emitter with a resistor/fet combo such that the transistor never saturates. Any obvious problems or comments would be much appreciated. (edit: other than the wrong polarity fet of course).. I'm interested in seeing risetimes at the 1 to 2 nanosecond level..

I'll contribute some circuit ideas.

From my limited experience I would ask what the maximum current is you need for the arc and what the other side of the arc looks like- inductive or resistive? The current waveform through the arc would tell a lot about what the device needs. Use the smallest FET that can handle it. The on resistance will be issue number one and most of the heat will be there. A smaller part needs less juice to turn it on. Use a FET to drive it otherwise you need to work to turn off the driver. You will be operating in saturated mode so its all about switching times. Most of the packages will limit the minimum inductance. You may be able to use some of the RF parts, but bigger bucks and not necessarily any better.

Do you start and stop the arc with the transistor or use an LC to limit the arc? 1 nS rise times on the arc will be difficult enough but a 50% duty cycle is more of a big challenge, a 50 MHz pulse train? However maybe a resonant circuit driving the arc could do it? What is the breakdown voltage? Does the arc quench quickly? (Not well know detail- spark gap surge suppressors are bad for AC since they don't quench in 16 mS so they become a crowbar across the power line.)

You may get as good or better results using a packaged FET driver chip.

Would this gadget work for the 3D milling process with a carbon electrode?
 
I was quoting excerpted text of others who are 'experts' in the field. But, to just note the affect on current signal paths changes with freq which have impact in many ways which should be discussed and bad layouts practices noted and how to do it best way.
There's a very swish presentation, :), of these concepts I've mentioned before, http://www.diyaudio.com/forums/loun...ch-preamplifier-part-ii-4619.html#post3758766. Unfortunately, still seems to be hard to find on the Web at the moment - but I have a copy if anyone is interested ...
 
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Here is an experiment I did to entertain myself a number of years back ---- it is why I say the pcb copper thickness isnt that much of a factor:

I have to do this in a progression of steps... so you will be sure to understand what was done and how -->

Lets start with a capacitor winding/ coiled up. and look at the current flow direction on the plates. At the top, it is flowing to the right and at the bottom it is flowing to the left. If you connect the top and bottom together, you will cancel the inductance. [this is done in caps of all sizes and values]

View attachment cap windings.pdf

Now take a dozen large value (1000mfd) caps and parallel them with the same idea as above. The caps are all of very low inductance design like shown above with fields cancelling. Not all in a straight line parallel, but half are on top and half are on bottom of the pcb trace with top and bottom connected together. Then measure the resultant Z (mag/Ph) of the combination across this ultra low L cap bank. Thus getting much lower Z than if all were simply in parallel.

Oh, and BTW -- use a very, very, thin pcb trace metal (well under one mil thick).

View attachment low Z cap bank.pdf

When you measure the caps Z (mag/Phase) I have very very low phase change out to quit high freq for a 12,000 mfd cap total.

Now we are in skin-affect territory.

Since it is known that the high freqs travel on the outter edge of the trace, I thought up a way to change the Z without changing the pcb layout. I would increase just the path length for the high freqs and not the mid-lower freqs. I did it by increasing the path length using thin notches on the edge. Thus the edge signal (if there were any) would have a much long path and this would show up on the z/phase changes at HF's.

Edge on both + traces were modified like this:

View attachment skin affect 5.pdf

There WAS a noticable change in HF Z using very thin pcb trace material. Now the kicker to this: When another pcb was made using thicker traces (1-2mil), the skin-effect was not seen.

You will only see this if you can measure and obtain very very low inductance and very thin trace metal. A lower over-all R of the trace shunts the skin effect and makes it look like nothing at all is happening with regard to skin affect. Now raising the freq and current might bring it back into the picture but this is only audio.


THx-RNMarsh
 
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Most 3.5mm jack and RCA terminal connections are Gold-plated Nickel.

Nickel has high resistivity, right next to Lithium and Zinc.

This is the reason for resistivity within metals

That is taken very much out of context. It was concerning the temperature dependence of resistivity. You will notice silver, gold, copper and other pure metals usually used in wire are all very close to each other.
 
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I just bumped into this piece, by Archambeault, relevant to Richard's posts: http://www.emcs.org/acstrial/newsletters/fall08/tips.pdf

Good foundation info. From such work and others plus my own.... I can offer some generalizations for audio and especially DIY pcb layout artists;

* only use trace thickness of >1mil. [Recent brand name consumer amps I've seen are much less than this.]

* Do not indiscriminately (even at audio freqs) use a ground plane (especially under which multiple traces exist) without considering the mutual coupling affects.

More details at 10:00pm :) for the night owls.


THx-RNMarsh
 
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fine paper - but it does ignore plane thickness effect on resistivity - 1 mil thick trace is mentioned early with no explicit number for the plane so I assume that 1 mil is also used for the plane

The return current path will always find the path of least
impedance. This impedance will be dominated by inductance
at high frequencies. The low frequency inductance can be calculated
to a first order approximation with a simple rectangular
loop formula and the high frequency inductance can be
found using a standard per-unit-length approach. The frequency
where the inductance begins to dominate over the resistance
is very low, usually in the low KHz range.

is perfectly consistent with may posts, fasthenry analysis - except I did explicitly set the Cu thickness in the sim files, change it to observer the effects

think what quoted article summary says about the relation of inductance to resistance - and what simple logic says if you now change the Resistance term - by changing plane Cu thickness for instance

my take on the issue is if you want to control current loops at low audio frequencies you have to explicitly route the return with each current trace that is of concern and can't rely on gnd planes
 
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my take on the issue is if you want to control current loops at low audio frequencies you have to explicitly route the return with each current trace that is of concern and can't rely on gnd planes

is it 10:00pm already?

This is my recommendation as well. An application can be found at line #303 of Marsh Headphone Amp discussion.... In the Amplifier Forum. Where I apply it to the power distribution. And a separate plane for signal.

For the power, it was to contain the field and avoid mutual coupling to signal circuits. For the signal plane, it was thought more as a shield.... but also it could be on same side as signal traces to reduce crosstalk. But we are making a stereo unit here so I didnt. Where i placed it, its affect is to do a little of both.... field containment and shielded. If BW was an issue, i would place it on the same side as signal traces (lower C).

THx-RNMarsh
 
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is it 10:00pm already?

This is my recommendation as well. An application can be found at line #303 of Marsh Headphone Amp discussion.... In the Amplifier Forum. Where I apply it to the power distribution. And a separate plane for signal.

For the power, it was to contain the field and avoid mutual coupling to signal circuits. For the signal plane, it was thought more as a shield.... but also it could be on same side as signal traces to reduce crosstalk. But we are NOT making a stereo unit here so I didnt. Where i placed it, its affect is to do a little of both.... field containment and shielded. If BW was an issue, i would place it on the same side as signal traces (lower C).

THx-RNMarsh

correction -- in BOLD

-RM
 
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Does anyone use an EM Simulator that doesnt cost an arm and a leg And is accurate?

Also, looking for same qualities in SW which can do layout extraction to get the parasitic's associated with the layout...... usually done thru EM sim. The parasitics can be then put into SPICE to get the final circuit results.


THx-RNMarsh
 
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Do you have a current ORCAD license?

ECAD software is a strange business. Virtually none is complete and working. Most of the companies are not making a lot of money (by the investors standards), there is no money to be made in the cheap stuff and the expensive stuff is an annual licence on a par with an engineers salary. It takes about a year to get good with (learn all the work-arounds for all the bugs) and the next version may be starting from scratch. All the integration is nice but you need to buy into so much to get to the useful stuff. For example a basic PADS license was something around $4K with an annual maintenance fee. All negotiable. And then you get several levels of autorouter, spice, etc. to buy on top of it.

I understand the big IC companies roll their own ECAD solutions.

None of this stuff with the integrated field solvers etc. is aimed at the DIY market. Its all in the "if you need to ask the price you aren't a customer" class.

Years ago I saw a demo of one that looked really easy until I discovered that the salesguy's demo was preprogrammed to to the next step with each movement of the mouse.

Its in the necessary evil class of products.
 
Does anyone use an EM Simulator that doesnt cost an arm and a leg And is accurate?

See < EM simulation software - Wikipedia, the free encyclopedia > for a compilation.

EM and low cost do not go together well.

I had some exposure to Agilent ADS for 10 GB/s fiber optic transceivers, but
it is 2.5D only and HFSS produced full 3D solutions in abt. the same time, we
considered it better.

B4 that I had played with Empower, part of the Genesys suite when it
was not yet bought by Agilent, but more for microstrip structures such as
2.4 GHz filters for ham radio. I really liked the Genesys suite, could do
the important things but would not require a full time job to understand it.

You may start playing with Sonnet lite.

Also, looking for same qualities in SW which can do layout extraction to get the parasitic's associated with the layout...... usually done thru EM sim. The parasitics can be then put into SPICE to get the final circuit results.

Why don't you simply assume that each mm of wire has a nH and so on?
Improve your spice capacitor models with some nH parasitics and you will
see the 7 MHz series resonance of a 100nF.
Cheap, but an eye opener.

EM solvers are for structures that are NOT small against the wavelength,
but even at 1 MHz your audio circuits are small.

regards, Gerhard
 
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