The original JC-2 Amplifier Module:
My take on a power amplifier in Class A based on the JC-2.
R5 adjust for 2mA in the VAS.
R2 adjust for zero DC-offset in output.
R9 adjust for 1.1A bias in output for Class A.
THD is 0.0017%
My take on a power amplifier in Class A based on the JC-2.
R5 adjust for 2mA in the VAS.
R2 adjust for zero DC-offset in output.
R9 adjust for 1.1A bias in output for Class A.
THD is 0.0017%
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To properly handle the input capacitance of the Exicons I would definitely use 4-6mA in the Vas stage. At least, maybe even a little more.
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R
The maximum slew rate of a 20Vp 20KHz is about 2.5V/us. The voltage gain of the source follower is about 0.9 here. Thus you only see equivalent 1/10 input capacitance at the gate. That’s 50pf for ECX10P20. Plus the 10pf reverse transfer capacitance. The capacitance looking at the gate is about 60pf. You only need, 0.15mA for each device to get 2.5V/us. This, 0.3mA in total.To properly handle the input capacitance of the Exicons I would definitely use 4-6mA in the Vas stage. At least, maybe even a little more.
In practical l, you don’t need to worry about the driving current limit for these lateral mosfets.
To prevent TIM and minimize 19+20kHz CCIF IMD, you need at least 5x max dv/dt, i.e. 12.5V/us. John Curl would not be happy with your suggestion of 2.5V/us slew rate.The maximum slew rate of a 20Vp 20KHz is about 2.5V/us
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