The original JC-2 Amplifier Module:
My take on a power amplifier in Class AB based on the JC-2.
R5 adjust for 2.50mA in the VAS.
R2 adjust for zero DC-offset in output.
R9 adjust for 500mA bias in output for high Class AB.
THD is 0.0020%
My take on a power amplifier in Class AB based on the JC-2.
R5 adjust for 2.50mA in the VAS.
R2 adjust for zero DC-offset in output.
R9 adjust for 500mA bias in output for high Class AB.
THD is 0.0020%
Last edited:
The maximum slew rate of a 20Vp 20KHz is about 2.5V/us. The voltage gain of the source follower is about 0.9 here. Thus you only see equivalent 1/10 input capacitance at the gate. That’s 50pf for ECX10P20. Plus the 10pf reverse transfer capacitance. The capacitance looking at the gate is about 60pf. You only need, 0.15mA for each device to get 2.5V/us. This, 0.3mA in total.
In practical l, you don’t need to worry about the driving current limit for these lateral mosfets.
To prevent TIM and minimize 19+20kHz CCIF IMD, you need at least 5x max dv/dt, i.e. 12.5V/us. John Curl would not be happy with your suggestion of 2.5V/us slew rate.
I have made some changes. See first post.
Now I run at 500mA bias.
The difference with full class A is so small that it is not worth it.
Here is the squarewave at 10kHz 1 Watt:
Now I run at 500mA bias.
The difference with full class A is so small that it is not worth it.
Here is the squarewave at 10kHz 1 Watt:
Its a little more complicated as the gate charge depends mainly on the output current, not the signal voltage, so reactive loads introduce a phase shift and lower load impedances increase the gate/source voltage swings at the device. Or put another way that 0.9 figure only makes sense for a resistive load of a certain magnitude.
It's perhaps better to look at the maximum Vgs swing, assuming a maximum current through the devices, this might be +/-6V for instance for +/-7.5A, so the dV/dt value at 20kHz is then about 0.8V/us, which for 2x500pF suggests a combined gate current around +/-0.8mA. Add in safety factors and 2mA perhaps per output pair.
But you also have to consider what happens near clipping where the device's transconductance drops rapidly - extra drive ability there will help extend the output voltage range. The typical output characteristics suggest this kicks in perhaps 10 to 15 volts from the rail at high current levels, which is pretty significant.
To get good output swing from these devices takes both a higher driver supply voltage and a generous standing current in those drivers to help with this drop in transconductance (and other tricks like paralleling the output devices or using the double-die versions).
I also note this circuit lacks zener protection on the gate-source junctions, a very cheap insurance policy its a no-brainer to always use this with laterals. Back-to-back 12V zeners between gate and source (you need Vgs to swing both directions on both devices). The abs-max rating for Vgs is +/-14V.
Its also worth noting that gate-source capacitances are non-linear and depend on Vgs, for the Exicons it rises to 700pF at higher Vgs, so that's a better figure to start at than the nominal 500pF Ciss.
Oh, one last thing, the Profusion pages state the Exicons have an integral protection diode. This seems to be a mis-understanding, there is no internal protection that prevents Vgs exceeding 14V, there are internal body-diodes of course.
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Yep, besides the current requirements, this is more of my concern. It results more THD if the lateral mosfets are driven by VAS directly. Putting a EF stage in between VAS and output mosfets is highly recommended.
Linup, I would recommend that you seek out the Servo-60 and Servo-100 articles by the late Erno Borbely. They carry some information on drive requirements for the MOSFETS based on his experience and info on current requirements for the "Lender" transistors (sorry don't know what else to call them).
Note that Mr Borbely used two transistors for the "Lender function" whilst Mr. Curl typically use one for most of the Parasound poweramps as in your scematic.
If you want to try out and/or simulate something novel, search out John Linsely Hood's idea for current mirror in "Borbely Lender" type circuits that is supposed to overcome the instability/current hogging that result from using normal current mirrors on fully-symetrical/complimentary input stages.
I have never seen a schematic or simulation of how this work in practice. Search "Lender" on this forum and you will find details in one of the threads.
PS- Are you sure that this amplifier meets the requirements necessary for stability without output inductor?
Note that Mr Borbely used two transistors for the "Lender function" whilst Mr. Curl typically use one for most of the Parasound poweramps as in your scematic.
If you want to try out and/or simulate something novel, search out John Linsely Hood's idea for current mirror in "Borbely Lender" type circuits that is supposed to overcome the instability/current hogging that result from using normal current mirrors on fully-symetrical/complimentary input stages.
I have never seen a schematic or simulation of how this work in practice. Search "Lender" on this forum and you will find details in one of the threads.
PS- Are you sure that this amplifier meets the requirements necessary for stability without output inductor?
