This is a further development of the power follower 99 from cuifolli's site... it's referenced to the upper regulated positive rail to isolate it from the PSU caps. further it works via a shunt like principle where the active device diverts the current around the load... sure the concept has very good performance, as it is very very pure, but also terribly inefficient.
thus a quite expensive build,
thus a quite expensive build,
By the way, Vladimir, are you not using any gate stoppers on these?
se
Steve, you are right, I use 100R gate stoppers. I have not shown them in the schematics, since a need in using them depends on layout and design. With jFETs, sometimes they are not needed, since jFETs do not tend to oscillations as much as MOSFETs.
Also, depending on the square wave responce, one may need RC (1kOhm, 22pF) band limiting chain before the gate of VT1.
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This is a further development of the power follower 99 from cuifolli's site... it's referenced to the upper regulated positive rail to isolate it from the PSU caps. further it works via a shunt like principle where the active device diverts the current around the load... sure the concept has very good performance, as it is very very pure, but also terribly inefficient.
thus a quite expensive build,
As I mentioned before, initially I was seriously intended to play with the transconductance amp approach, with output impedance being determined by a shunt resistor in parallel to load. I have spent several days, changing resistors and loudspeakers. With small speakers, like Castle Acoustics Pembroke, this approach was rather good. But, after changing to follower-like configuration, I was again and again convinced, that the inefficient follower approach is unbeatable soundwise.
All the story took 3-4 weekends for me.
Hi,
you have a source follower loaded with a CCS, just a FET version of an emitter follower with a CCS load.
It's a B1 after an excess of spinach and steroids.
The CCS load has doubled the theoretical efficiency cf. the resistor loaded version.
Please post the actual schematic that is giving you the problem.
you have a source follower loaded with a CCS, just a FET version of an emitter follower with a CCS load.
It's a B1 after an excess of spinach and steroids.
The CCS load has doubled the theoretical efficiency cf. the resistor loaded version.
Please post the actual schematic that is giving you the problem.
Hi,
you have a source follower loaded with a CCS, just a FET version of an emitter follower with a CCS load.
It's a B1 after an excess of spinach and steroids.
The CCS load has doubled the theoretical efficiency cf. the resistor loaded version. Please post the actual schematic that is giving you the problem.
Hello, Andrew
Why you conclude that there is a problem, with this simple schematics one gets only a pleasure.
Looking a bit more, you may find a small but important difference between this buffer and a standard EF buffer. I would not like to pass again this old way, pointing out that EF stage has its load in parallel to CCS, while this buffer has load in parallel to active device.
Simulation-wise, one does not see essential difference, but sound-wise the difference between the cases is huge. What we listen and pay attention to, does not live in sim-soft house. We pay attention more to parts effects, EMI effects, materials effects, and, unfortunately, not to linearity for volt-level quasi-stationary signals.
Vladimir would it change much to have a more crude type of current-source like one based on an IRF og IXYS delpetion mode FET..???
Is the FET you use really a J-fet or is it like the types i pointed to a lateral HF mosfet...??
Is the FET you use really a J-fet or is it like the types i pointed to a lateral HF mosfet...??
Vladimir would it change much to have a more crude type of current-source like one based on an IRF og IXYS delpetion mode FET..???
Is the FET you use really a J-fet or is it like the types i pointed to a lateral HF mosfet...??
From general view, must not be any problem with using MOSFET or BJT based CCS.
However, I tend to using similar parts for both active device and CCS, just by hoping for some mutual cancellation of distortions, produced by similar parts in opposite directions (CCSs are not perfect ...). Therefore we need good C4 film cap at PS rail after regulation.
As for these jFETs, they are really standard ordinary jFETs, like 2SK170 or similar, but designed for using at radio frequencies applications, with power dissipation up to 6W (as per datasheet), in reality up to 8-10W (with good heatsink).
Analogs to them are produced by Crystalonics, parts notions are CP650, CP651
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Please post the actual schematic that is giving you the problem.
Sorry I have got threads mixed up.Hello, Andrew
Why you conclude that there is a problem,
But to the load being returned to the supply side.
I have been advocating this for many years. This is one of the very few topologies that actually runs at constant current.
I expect this mode of operation to be very resistant to the PSU interfering with the sound quality. There have been many arguments along the years, but a thread just recently came down on the side of it showing promise and proposed a few designs to get the benefit from the idea.
It is simply an EF with the load returned to the supply side. nothing fancy nor different really.
But to the load being returned to the supply side.
I have been advocating this for many years. This is one of the very few topologies that actually runs at constant current.
I expect this mode of operation to be very resistant to the PSU interfering with the sound quality. There have been many arguments along the years, but a thread just recently came down on the side of it showing promise and proposed a few designs to get the benefit from the idea.
It is simply an EF with the load returned to the supply side. nothing fancy nor different really.
100% agree with you, nothing new, and the benefit is just from, as you are saying, in decreasing PSU interfering with the main schematics.
In this connection, I would like to ask, does sims able to reveal this PS interferring? And there are some more effects lying outside the sims domain.
Thanks Andrew for your really respectable opinion.
Andrew,
All topologies that have a constant current source run at constant current. This is not more constant current than any other topology.This is one of the very few topologies that actually runs at constant current.
All topologies that have a constant current source run at constant current. This is not more constant current than any other topology.
WuYit, without any offence, but there is something special with your understanding of the follower-like topology.
Possibly, A.Ciuffolli killed somebody from your relatives (joke).
it's simply the only topology where the load and active device works in parallel...and where they share the same references....the purest single ended class A that exists..I understand why you consider it listening to devices rather that to topological issues....!
Three things is springs to mind....device, quality of the upper rail and just how ideal the CCS is....
Three things is springs to mind....device, quality of the upper rail and just how ideal the CCS is....
Three things is springs to mind....device, quality of the upper rail and just how ideal the CCS is....
Yes, any CCS is not ideal, has its own pulse responce issues, therfore HF active device will not match good a low-Ft BJT based CCS.
And, to compensate slight nonideality of CCS, I was forced to put C4 at PS rail. With an ideal CCS it would not be needed.
For standard emitter follower stage, any film cap at PS rail is not able to completely rectify the problems with sound, it helps, but only partially. Final result with standard EF stage, is much inferior to the parallel connection of active device-load.
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Wuyit, you are misinformed.All topologies that have a constant current source run at constant current. This is not more constant current than any other topology.
Very few ClassA topologies are constant current. The vast majority of single ended and push-pull ClassA stages are not constant current.
The supply rail/s see/s a transposed copy of the current variation drawn by the load.
The problem of course is that these devices appear to be "unobtainium" outside of the mother Ruskia?
I'd love to have a tray of those power jfets around... Wheeee!
Btw, have you seen how the IDSS matches on these?
And what is the typical IDSS of these devices, btw?
_-_-
I'd love to have a tray of those power jfets around... Wheeee!
Btw, have you seen how the IDSS matches on these?
And what is the typical IDSS of these devices, btw?
_-_-
Andrew,
I just stated that "All topologies that have a constant current source run at constant current."
No current variations are seen with constant current source.
I just stated that "All topologies that have a constant current source run at constant current."
No current variations are seen with constant current source.
The problem of course is that these devices appear to be "unobtainium" outside of the mother Ruskia?
I'd love to have a tray of those power jfets around... Wheeee!
Btw, have you seen how the IDSS matches on these?
And what is the typical IDSS of these devices, btw?
_-_-
Idss is usually around 700mA, pinch-off Vgs voltages are -5...7V, transconductance near 100mS. Matching, as usual, not very good.
In Russia, these jFETs are not popular, most DIYers prefer to use C5200-A1943 or MJL.
In USA they are quite available (CP650, CP651), simply one must pay 10 times more. But, I could suppose, US parts have better silicon purity and technological norms.
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Andrew,
I just stated that "All topologies that have a constant current source run at constant current."
No current variations are seen with constant current source.
WuYit, I respect your knowledge and your posts in most of cases. Therefore, can not understand your thinking about shunt-like follower stages.
This your last statement is very similar to, for instance, "all topologies are the same, since every one contains transistors". Discussing such things can simply kill any value of the given thread.
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