Hi Pafi, perhaps I was a little too hasty in saying this can't be done. I've been doing some SPICE simulations of a configuration where the post-filter NFB is taken to the summing junction at the input op-amp. It does need a reasonably fast op-amp, (though nothing exotic, I was using an OP37 for the SPICE sims). You have to be careful about the dominant-pole frequency compensation of the op-amp, as well as the NFB network to ensure it will be stable with all expected input signals, as well as oscillating at the desired frequency, but it does give much lower distortion at low frequencies than the standard 'Philips ap-note' UCD circuit.
This configuration described abaove is different from Bruno's schematic in his AES paper, where he shows an input op-amp providing an active pole, but where the switching signal NFB path is still feeding into the comparator. In my simulations I have a single NFB path feeding into a summing junction at the op-amp. The comparator input is connected to the output of the op-amp only.
I still don't know if the OTA at the input of the 2092 is fast enough, or whether the required frequency compensation could be applied around it.
This configuration described abaove is different from Bruno's schematic in his AES paper, where he shows an input op-amp providing an active pole, but where the switching signal NFB path is still feeding into the comparator. In my simulations I have a single NFB path feeding into a summing junction at the op-amp. The comparator input is connected to the output of the op-amp only.
I still don't know if the OTA at the input of the 2092 is fast enough, or whether the required frequency compensation could be applied around it.
Hi,
the OP37 has a GBW of 63MHz and a open loop gain of 125dB, thus the dominant pole is placed at 35Hz.
If I apply the same to the IRS2092 OTA I have the following:
OTA Gain=60dB (from datasheet)
Small signal BW=9MHz. (from datasheet)
Is the small signal BW=GBW or is the -3dB BW in open loop?
If it is the GBW the dominant pole will be placed at 9kHz and it is
enough to compensate it with some phase shift.
Are my thinking correct or not at all?
thank you
the OP37 has a GBW of 63MHz and a open loop gain of 125dB, thus the dominant pole is placed at 35Hz.
If I apply the same to the IRS2092 OTA I have the following:
OTA Gain=60dB (from datasheet)
Small signal BW=9MHz. (from datasheet)
Is the small signal BW=GBW or is the -3dB BW in open loop?
If it is the GBW the dominant pole will be placed at 9kHz and it is
enough to compensate it with some phase shift.
Are my thinking correct or not at all?
thank you
Ouroboros!
Thank you!
I think there is no other thing to do: try it with 2092! They haven't specify open loop transfer of OTA correctly, so we have to measure it, or hope for best, but I dont think there will be a big problem.
mag!
Small signal BW=GBW, but maybe not with a single pole, however this is the most usual.
Thank you!
I think there is no other thing to do: try it with 2092! They haven't specify open loop transfer of OTA correctly, so we have to measure it, or hope for best, but I dont think there will be a big problem.
mag!
Small signal BW=GBW, but maybe not with a single pole, however this is the most usual.
Maybe you could try the "simple tweak foir NFB" with this one. This would cost you next to nothing and if it doesn't work as intended it can be changed easily.
http://www.diyaudio.com/forums/showthread.php?s=&threadid=58448&highlight=
Regards
Charles
http://www.diyaudio.com/forums/showthread.php?s=&threadid=58448&highlight=
Regards
Charles
This is the sort of thing I am looking at for the 2092. (At a very simple simulation level in TINA).
The complex frequency compensation network around the OTA in the IR reference design is required for their pre-filter NFB design, but will not work in a post-filter design. My sim schematic shows a simple C-R compensation network across the OTA, which works well, but of course my OTA model is a simple VCCS, with feedback to set the maximum gain at 60dB, and a single pole roll-of.
Might be a starting point for others though.
The complex frequency compensation network around the OTA in the IR reference design is required for their pre-filter NFB design, but will not work in a post-filter design. My sim schematic shows a simple C-R compensation network across the OTA, which works well, but of course my OTA model is a simple VCCS, with feedback to set the maximum gain at 60dB, and a single pole roll-of.
Might be a starting point for others though.
Attachments
What you try to do is a very simple case of what is called an NTF (=node transition filter) by Hawksford:
http://www.essex.ac.uk/dces/researc...ocs/J51 Switching amplifiers and feedback.pdf
Regards
Charles
http://www.essex.ac.uk/dces/researc...ocs/J51 Switching amplifiers and feedback.pdf
Regards
Charles
Simulation library for IRS2092
Does any one know where I can get the Simulation library for IRS2092 and send to me?Thanks
Email:anshfe@hotmail.com
Does any one know where I can get the Simulation library for IRS2092 and send to me?Thanks
Email:anshfe@hotmail.com
can anybody give me some design to build a amplifier using ir2110....have some problems in designing....
Pafi & Ouroboros,
Well i tried it on IRS2092 and it works............😀
Details please!
Details are already in this thread.
There have been discussions of both UcD and NTF style topologies for post-filter feedback. It was also suggested that post-filter feedback with this chip is impossible. I'm looking for information on which method you used and how you arrived at the optimal values. I believe this could be of great interest to other IRS2092 users. Thanks!
Configure the OTA section of this chip as unity gain inverting amplifier, add compensation cap at its output then apply UCD style feedback and you are done. It works this way.
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I found the basic IRS2092 datasheet worked ok up to medium volumes.
I found it then kept resetting itself.
I had to add a voltage scaler to the upper over current detect.
Then I had problems with huge thumps and siren type noises on power down.
This turned out to be due to using large smoothing capacitors and the 2092 didn't like this. I added a small lPIC micro that monitored VCC and if it dropped below 12 volts it held the 2092 in reset.
The 2092 is also fussy about decoupling and layout.
If you use the reference design pcb layout you should be ok.
I found it then kept resetting itself.
I had to add a voltage scaler to the upper over current detect.
Then I had problems with huge thumps and siren type noises on power down.
This turned out to be due to using large smoothing capacitors and the 2092 didn't like this. I added a small lPIC micro that monitored VCC and if it dropped below 12 volts it held the 2092 in reset.
The 2092 is also fussy about decoupling and layout.
If you use the reference design pcb layout you should be ok.
Hello Workhorse,you confirmed that the circuit provided by Ouroboros works. Is it stable? I would like to try it.Thanks
I already made a PCB 5x5cm all SMD with that feedback network (posted by ouroboros).I wait for the PCB to arrive from China, then il know if it works or not .
Credits to Pafi & Ouroboros 🙂 , Here is the working of IRS2092 in Post Filter Feedback Arrangement.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
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Credits to Pafi & Ouroboros 🙂 , Here is the working of IRS2092 in Post Filter Feedback Arrangement.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
Could you post a rough schematic?
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