I2S signal from this circuit

[resets]

Hi there,

I want to pick up the I2S signal from the attached circuit.
Can some help?

Many thanks!

 

[percival007]

It won't be i2S out of the CXD1167. Probably EIAJ (?)

See here for conversion possibilities.........

https://www.diyaudio.com/community/threads/eiaj-to-i2s-converter-and-vice-versa.58564/

 

[NickKUK]

Also will the bit clock be skewed vs the frame select?

 

[resets]

Would this be a better candidatre to pick up I2S?
SAA 7321

 

[NickKUK]

Probably want to check the timing to ensure there’a no skew between clocks and bits.

 

[Zoran]

I think also that it is not I2S format
The dac chip on the sch is Sanyo LC78815M
please take lokk at the PDF
Also it have 7 posibile formats (non of them I2S)
try to detemine which format is used by checking mode settings pins?
.
FSEL pin 12 is HIGH connected to pin 10 (DVdd)
MODE1 pin 13 is LOW connected to pin 15 (DGND)
MODE2 pin 14 is HIGH connected to pin 10 (DVdd)
.
So it is the the figure 3 format alternate timing mode 2 from the datasheet page 6.
not good news 🙁
48bit lenght for Fs, right justified ets... Compare to the I2S standard...
cheers
And it have posibility of 2 cases format. See the picture.
You have to measure and determine which of these 2 is present.
And based on that eventualy think about some translating circuit?
.
From the first page, dac accepts 2S complement serial input data word.

 

[resets]

Thank you Zoran, but I got the I2S Signal from the circuit and player in post #4.
As it is a Phillips circuit it works.
And it sounds not bad - guess the missing 2 times SPDIF translation is the reason.

But I have no idea how to implement a mute circuit.
I get Plops if I change CDs etc.

Best
René