thanh said:
I think it's not advisable to do so. There have been some discussions abt slone's doble current mirrors and stability. The truble most is treating like a tempratur stability problem rather than taking another aproach towards the better solution.
If you want a symetric amp and using current mirrors, the problem is the undefined voltage output, ie there will bee problems in the VAS stage's bias point. Because the input stage then becomes a differensial voltage to differensial current stage.
In stead a current sorse with serial current feedback from VAS current and controll (drive) from differensial stage is a possible solution. (serial current feedback with differensial current gain, as current feedback is aplyed, some will call it). To say the output resistance is high, but pssr wil bee good, or better than without the smal local feedback. But then treating VAS stage like a current sorse is not so common, but have been done by some designers.
I mean having differensial current to the output stage much is then dependent on the design of output stage ( or input to the output stage). And ! you know how it will slev (if).
Yes, yes, yes, thats it. Symmetrical design with current mirrors---->you cannot calculate the bias in VAS. Try it in real amp. Dont trust SIM.
andy_c said:
Hi,
Tried it... Yer right. The input stage pole I was referring to is too far away to be of any significance, the power stage input capacitance will squarely dominate.
(I drew up a circuit with BF245A inputs, 0.5mA each, 0.5mA through the VAS. All other transistors BC547/557)
The circuit with the miller feedback applied to the emitter of the cascode is only fractionally slower (13.7MHz at unity gain and 45º ph mgn) than the simplest circuit without the cascode (13.8MHz). Just as in your simulation, moving the feedback point to the base of the VAS with the cascode still present is not good (10MHz).
It proves your point that in terms of bandwidth, the modified miller circuit is at no disadvantage compared to the simple miller circuit. In terms of PSRR it's obviously much better.
For fair comparison I placed the exact same input stage in a folded cascode arrangement using the same transistor types. The resulting circuit is noticeably faster than the Miller amp: 20MHz, dictated by the input stage pole which does become significant at that frequency. The output stage's input capacitance that formed the crux (the second pole) of the pole splitting story in Miller amps does not create a second pole in the FC amp and therefore needs no compensation. It becomes a part of the dominant pole, thus no longer affecting phase margin.
As far as the voltage gain stage is concerned, the higher loop bandwidth isn't borne out in higher linearity compared to the Miller version (see previous post). It does improve the output stage's linearity though - if the OS is fast enough (yes for small signal op amps, no for power amps). It means the FC is still the ticket for small signal op amps while the modified miller circuit is probably the best choice for power amps (thanks to the reduced requirements on power stage input impedance). Unfortunately I shan't be trying it out anytime soon - all my power amps are class D and I won't be building linear power amps anytime soon...
Thanks for pointing out the modified miller circuit with improved PSRR. I hope you'll have similar fun toying with the folded cascode amp.
Cheers,
Bruno
I'm a bit confused. Are you trying to build a bridged output stage with one input pair (effectively an op amp with a differential output)?MikeB said:
Such a circuit is known as a "fully differential op amp". To maintain zero volts bias on both outputs (common mode voltage) such amps have a second pair of inputs that control the common mode voltage. A recent implementation is the OPA1632 (there are some threads on this forum concerning this device).
I am using some fake c2362/a1016 .So beta of these is low ,I can't adjust the balance of LPT though degeneration resistor is 33 . If I use a higher resistor , perhaps I will not use current mirror .In my country, I can't buy good transistor.
Why?lumanauw said:
I can't have the equality of Vce of 2 half transistors. Can you understand ?
thanh said:
Say: you have a symetric amp vith current mirrors. Then it would bee cind of naturally to say that the input transistor and the mirrored transistor('s) will share the rail voltage and VCE is equal. Then you have vasted a lot of voltage as the base voltage at the VAS is at half of the rail. Here you will waste a lot of available voltage swing. Then let the breese( the wind ) pass your ampfor a sec or to: the termal imbalanse in the input will then change bfe~Hfe a little more in on of the transistors and imbalance is a fact. Or: Is the bfe~Hfe in the VAS (or current gain stage) equal? witch correction for slight altenations in the amp have you done to compensate for the door to open?
Slightly nonsymetric mirroring:
What will happen if one of the current sorces would increase current (?) Bfe~Hfe as current in the input stage will give a slight change in gm and imbalance is a fact!. The common mode is then the bias, wich needs a better stability.
Som have compensated for the fenomena with putting a resistor to a reference voltage. But somtimes this resistor's value have been set equaly to the othervise used collector resistanse and the stage as again almost back to the working condition as resistor loading. (waste of components).
To make it work use a smal feedback from the current in the next stage ( vas stage lokal current feedback to the mirrors ). The stability for the VAS current can then bee established over a much wider range. And i have tried.
I did'nt gett any replu on my tread of the subjekt earlier here yuo can see the common mode rejection stage in a fully symetric amp.
The opamp example in one reply abowe is also refering to a common mode feedback point. opa 1632
and my "little" bear amp : The circuit :
http://www.diyaudio.com/forums/attachment.php?s=&postid=448667
The tread i started (without replys so far) http://www.diyaudio.com/forums/showthread.php?s=&threadid=38632
Too many new word:
doble-> trouble
sorse->source
subjekt->subject
Am I right?
konrad! Thank you! Indeed,my english is not good .I can't understand you instantly .I am accessing internet at a internet cafe . I will save your post ,And then go home, I will look up my dictionnary.
doble-> trouble
sorse->source
subjekt->subject
Am I right?
konrad! Thank you! Indeed,my english is not good .I can't understand you instantly .I am accessing internet at a internet cafe . I will save your post ,And then go home, I will look up my dictionnary.
I can calculate the bias in VAS but amp doesn't work. I think you doesn't succeed in building a symmetry amp
.
I think what you experience is the same as I experienced. The output voltage will be more than 3VDC, isn't it?
Just remove the current mirror and place R (calculate a little). Then it will work
OK, I cannot calculate bias in VAS of full complementary+current mirror cct. How about this. You MEASURE the bias in VAS (of your amp in current condition). Is it roughly the same as your calculation?
I think what you experience is the same as I experienced. The output voltage will be more than 3VDC, isn't it?
Just remove the current mirror and place R (calculate a little). Then it will work
I mod it .Now I have got a Hafler. When I "moding" , I see that perhaps c2383/a1013 is destroyed.MikeB said:
I has no patient to build a Slone's circuit.I am so tired .
andy_c said:
Bruno Putzeys said:
Actually Bruno, andy_c's analysis is correct, specifically for a TIS with a grounded-collector, beta-enhancing follower as used in his illustration....
Sensitivity to Cbc that you've aluded to does not exist at significant levels for this topology....
Note however, that such a follower cannot generally be combined with a TIS cascode within the minor-loop as shown in Andy's circuit, as this will almost certainly oscillate....
In addition, cascode-referenced minor-loop compensation recommended by Self, (but not properly referenced by him!!
), may give rise to a poorly-damped quadratic pole pair within the minor loop, leading to instability.....The cbc nonlinearity problem is for the "normal" miller topology only. A cascoded VAS (as he notes somewhere) gets rid of this nonlinearity.mikeks said:
I'm too lazy to re-read all the posts but I hope I never claimed otherwise anywhere...😀
To be fair, the trick with the DC (ground-referred) biased cascode was unknown to me. It shows how to make a Miller amp with good PSRR, leaving the folded cascode only a not-very-significant speed advantage.
The only thing I'd need to sort out is how to adapt this circuit to build a fully differential op amp (with CM feedback). So far the only workable circuits I've seen/found are all folded cascode - the main reason why I go to such lengths to optimise this type of circuit.
To opamp IC designers, both this and the folded cascode amp have the same problem - the need for a separate ground pin. The DC bias solution also precludes a wide supply range (another reason why they prefer to bias only from the rails). For discrete devotees like me, neither is an issue. You can be sure I'll be building test circuits to see how far either will go.
Bruno Putzeys said:
CMF overated in power amps....but easily implemented with the ubiquitous double cascaded differential pairs topology...
Generally, forget the folded cascode in this application....looks intuitively elegant, but is sub-optimal in practice...
I don't build power amps other than class D. It's for op amps in DACs and so on. The performance of the CMFB must be such that the performance from each output to GND is identical to that of output-to-output. You're never sure someone isn't taking an unbalanced feed. Actually you're sure someone will.mikeks said:
So far they've been fine in my practice. Admittedly I'm throwing a lot of circuitry at it, but in the end I'm still getting performance I haven't seen anyone else get with other topologies. This is why I have to make the "competing" test circuit myself. Since I haven't done that so far, I might indeed be putting my efforts into the wrong topology.mikeks said:
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