Russ White said:Hi Terry,
Thanks for good input and kind words.
I can actually did get my cct to simulate next to zero distortion(which is why I think simulation distortion measurements are bollocks, but fun to look at) , but to do that I have to run a lot of current through it and run it right on the edge of stability.
I'm surprised you actually ran it at higher currents, it already has
quite a bit running through those bc560's. You are a brave man!
Distortion goes up a bit in the cct shown because I added some compensation, but it should be pretty stable I think. If I need to I will add base stoppers, but I am hoping not to have to.
Are you referring to the 22pF // 20k on the OCM network?
[/B]
BC550 and BC560 are low noise types, so things should be pretty good to use all the way around the CCT. Any other part suggestions?
[/B]
BC337 type is lower noise.
TL431 is a big noise generator, ~ 40nV/rt Hz, but CM servo will come
to the rescue here as 431's noise will manifest CM, which is lucky.
T
I was actually speaking of the 1nf to GND at the OPs. 🙂 Its actually a filter but it seems to stabilize the cct, probably just by lowering the bandwidth.
Cheers!
Russ
Cheers!
Russ
Nice circuit!
Using common base, folded cascodes and cascoded CCS makes a lot of sense. Nice way to place R1 in a differential way, also!
But what is the secret behind the use of the CFP transistors here?
I played a bit with simulations on I/V converters some time ago, and found that a significant contribution to the THD is the current that gets "lost" (or leaked) by the common base input transistor.
You'll always get some leak there, with a basic transistor it's due to it finite beta. Having a leak is okay as long as it is constant, but it is not. Beta changes wrt current and voltage.
Switching to a darlington only reduces the effect by an order of another beta, but it doesn't dissapear.
Is the CFP better for that?
Using common base, folded cascodes and cascoded CCS makes a lot of sense. Nice way to place R1 in a differential way, also!
But what is the secret behind the use of the CFP transistors here?
I played a bit with simulations on I/V converters some time ago, and found that a significant contribution to the THD is the current that gets "lost" (or leaked) by the common base input transistor.
You'll always get some leak there, with a basic transistor it's due to it finite beta. Having a leak is okay as long as it is constant, but it is not. Beta changes wrt current and voltage.
Switching to a darlington only reduces the effect by an order of another beta, but it doesn't dissapear.
Is the CFP better for that?
Thanks Bricolo,
I am afraid I don't feel qualified to answer your questions. 🙂
I used the CFPs because the distortion went way down after I put them in. 🙂
The cascodes I used to remove thermal effects from key areas.
The folded cascode I used to refer the output to ground and improve PSRR.
For all to review here is a more polished schematic of the "Counterpoint" IV stage.
I think it nearly done.
Any suggestions for refinement are welcome.
Notice I changed the way I took the OCM voltage. 🙂 I like this solution much better. RG1/RG2 set the voltage gain and create the common mode voltage at the same time. 🙂
I also figured out how to better compensate the servo Diff pair with C1.
Please forgive that some of the part numbers are out of sequence. I still need to clean it up for the final schematic.
Cheers!
Russ
I am afraid I don't feel qualified to answer your questions. 🙂
I used the CFPs because the distortion went way down after I put them in. 🙂
The cascodes I used to remove thermal effects from key areas.
The folded cascode I used to refer the output to ground and improve PSRR.
For all to review here is a more polished schematic of the "Counterpoint" IV stage.
I think it nearly done.
Any suggestions for refinement are welcome.
Notice I changed the way I took the OCM voltage. 🙂 I like this solution much better. RG1/RG2 set the voltage gain and create the common mode voltage at the same time. 🙂
I also figured out how to better compensate the servo Diff pair with C1.
Please forgive that some of the part numbers are out of sequence. I still need to clean it up for the final schematic.
Cheers!
Russ
Attachments
Russ White said:The folded cascode I used to refer the output to ground and improve PSRR.
I have to correct myself here, the output is not referred to ground really, but to the opposing output. And both outputs are set to track GND via the OCM servo. 🙂
Cheers!
Russ
OK, doing some more simulation I find that the schematic I just posted starts up (with DC supplies ramped from 0) very very badly.... So forget it....
Fortunately the fix is easy. It looks like the gain setting resistors need to be referred to GND and not each other to get a good startup.
I will post a fixed schematic tomorrow. Time for bed here.
Cheers!
Russ
Fortunately the fix is easy. It looks like the gain setting resistors need to be referred to GND and not each other to get a good startup.
I will post a fixed schematic tomorrow. Time for bed here.
Cheers!
Russ
Re: Re: No for something I hope you'll really like...
Do share. 🙂
Terry Demol said:I have been doing many folded cascode designs myself, somewhat
different to yours. They go from simple to pretty complex.
So far my best result, which is a fairly complex CCT simulates at
< 0.000002% (-156dB) between phases (balanced OP) and
~ 0.000005% (-146dB) at each phase OP THD.
That is with Sabres 195 R / 8mA at IP and 2V RMS OP per phase.
Do share. 🙂
Complex simplicity; simplified complexity theory
Major logorheia here...FWIW, here's a way I look at circuits, ss ones. Please forgive if it, or some of it seems obvious, or not very original, but the magic is in the subtlties.
In rare moments of organization I divide circuits into support (static, bias, current source) and active (signal path), of which the active parts are further categorized as brain and brawn parts. Servos, if they are truly subsonic, I will call support, but if in the audio band, are active.
In Haiuku 4, Q11 is the brain, Q26, 25, 13, 34 are the brawn for example.
The load line of Q11, or any active "brain" device will be somewhat non-linear; by adding brawn as either constant current or constant voltage, the load line becomes horiz or vert, or with both CC and CV, a "load dot". Beyond sims, in meatspace usually takes a few compensation tricks to stay stable, but lots of good things happen. The composite/stasis is very linear, minimal thermal tails, minimal base current variations with signal. Keep the brain on a separate die/substrate/package from the brawn to keep the brawn from thermally modulating the brain. Halcro, Lavardin, and our own peufeu have touched on this before.
For each brain device, look at the ratio of delta power under signal conditions to idle power. The smaller the better. Depending on the sim tool, this will be easy, or may need to be done manually, but can be used to fine tune implementations.
For support circuitry, like current sources: cascoding usually does not add loop stability issues, but almost always gives higher PSRR. This is important in meatspace, where less than ideal conditions exist. Even if in a differential circuit, where one could presume cancellation will happen, in the act of cancellation, the devices are being modulated. And, more importantly, lessens self modulation of the device(s) it is feeding, for instance Q24, 42, 45, if cascoded will not modulate slightly as the output node swings with signal. Q9 could also use a cascode, not for signal self modulation, but for increased PSRR.
Q34 may not be nesc, as the folded cascode holds the first stage in CV. But, a cascode of Q23 would be a very good idea. (and other half). For the orig Haiku, Q34 is needed, as the signal swings the load above it.
Running the devices "hot" up to a point is a good thing. Frinstance TO92 packages generally will not crack through thermal cycling if dissipating less than say 40 mW each. Electron/hole density can be surprisingly low, ie rough texture, in low power bipolar transistor circuits, and you get a higher idle power to swamp out the delta power of the brain devices. Subjectively, more liquid.
I think of the servo bandwidth like a Yacht, if you need to ask, don't. The circuit without audio band servo correction is quite linear, and unless Q5,6,7,8 are supported with brawn devices and made into "load dot" devices, all of the usual stuff will be injected into the mix. If the servo BW is made subsonic, then the tails/modulations of Q5,6,7,8 will be less if not relevant, and they won't need brawn support.
Once one gets below one ppm, minus 120dB steady state specs, why not take into account the subtle dynamic phenomena...as it will enhance the specs *and* the sonics. Otherwise, one ends up with something that measures good, meets "ob specs" but just doesn't quite sound or feel right.
Think of the Hermes Archetype, the communicator who is also the trickster: measurements will not specifically lie to you, but will not tell you whole story either, and will not tell what they are not telling you.
Hey, how about calling this the "Manx"...no (thermal) tail...?
Terry, if what you are doing with folded cascodes is not proprietary or NDA'd to some entity, please do share. It's so easy to overlook the obvious, till someone points it out...and we are here to point that out to each other. Probably something really important I'm overlooking, but will catch that next cycle...
Major logorheia here...FWIW, here's a way I look at circuits, ss ones. Please forgive if it, or some of it seems obvious, or not very original, but the magic is in the subtlties.
In rare moments of organization I divide circuits into support (static, bias, current source) and active (signal path), of which the active parts are further categorized as brain and brawn parts. Servos, if they are truly subsonic, I will call support, but if in the audio band, are active.
In Haiuku 4, Q11 is the brain, Q26, 25, 13, 34 are the brawn for example.
The load line of Q11, or any active "brain" device will be somewhat non-linear; by adding brawn as either constant current or constant voltage, the load line becomes horiz or vert, or with both CC and CV, a "load dot". Beyond sims, in meatspace usually takes a few compensation tricks to stay stable, but lots of good things happen. The composite/stasis is very linear, minimal thermal tails, minimal base current variations with signal. Keep the brain on a separate die/substrate/package from the brawn to keep the brawn from thermally modulating the brain. Halcro, Lavardin, and our own peufeu have touched on this before.
For each brain device, look at the ratio of delta power under signal conditions to idle power. The smaller the better. Depending on the sim tool, this will be easy, or may need to be done manually, but can be used to fine tune implementations.
For support circuitry, like current sources: cascoding usually does not add loop stability issues, but almost always gives higher PSRR. This is important in meatspace, where less than ideal conditions exist. Even if in a differential circuit, where one could presume cancellation will happen, in the act of cancellation, the devices are being modulated. And, more importantly, lessens self modulation of the device(s) it is feeding, for instance Q24, 42, 45, if cascoded will not modulate slightly as the output node swings with signal. Q9 could also use a cascode, not for signal self modulation, but for increased PSRR.
Q34 may not be nesc, as the folded cascode holds the first stage in CV. But, a cascode of Q23 would be a very good idea. (and other half). For the orig Haiku, Q34 is needed, as the signal swings the load above it.
Running the devices "hot" up to a point is a good thing. Frinstance TO92 packages generally will not crack through thermal cycling if dissipating less than say 40 mW each. Electron/hole density can be surprisingly low, ie rough texture, in low power bipolar transistor circuits, and you get a higher idle power to swamp out the delta power of the brain devices. Subjectively, more liquid.
I think of the servo bandwidth like a Yacht, if you need to ask, don't. The circuit without audio band servo correction is quite linear, and unless Q5,6,7,8 are supported with brawn devices and made into "load dot" devices, all of the usual stuff will be injected into the mix. If the servo BW is made subsonic, then the tails/modulations of Q5,6,7,8 will be less if not relevant, and they won't need brawn support.
Once one gets below one ppm, minus 120dB steady state specs, why not take into account the subtle dynamic phenomena...as it will enhance the specs *and* the sonics. Otherwise, one ends up with something that measures good, meets "ob specs" but just doesn't quite sound or feel right.
Think of the Hermes Archetype, the communicator who is also the trickster: measurements will not specifically lie to you, but will not tell you whole story either, and will not tell what they are not telling you.
Hey, how about calling this the "Manx"...no (thermal) tail...?
Terry, if what you are doing with folded cascodes is not proprietary or NDA'd to some entity, please do share. It's so easy to overlook the obvious, till someone points it out...and we are here to point that out to each other. Probably something really important I'm overlooking, but will catch that next cycle...
Hi WMS,
Thank you very much for your valuable insight. I have reflected on your post and modified my circuit.
I also figured out how to make it start up stably (at least in simulation) without having to tie the load resistors to GND. 🙂
As for the servo, It is very very similar to the approach TI used in the THS4131, though I am not sure how much bandwidth theirs has.
Here is the current state of the work in progress. 🙂
Thanks again, I really appreciate the chance to think critically.
The 1.65V input common mode VREF for the ESS DAC would probably be an LM4041 or similar. Suggestions welcome.
Cheers!
Russ
Thank you very much for your valuable insight. I have reflected on your post and modified my circuit.
I also figured out how to make it start up stably (at least in simulation) without having to tie the load resistors to GND. 🙂
As for the servo, It is very very similar to the approach TI used in the THS4131, though I am not sure how much bandwidth theirs has.
Here is the current state of the work in progress. 🙂
Thanks again, I really appreciate the chance to think critically.
The 1.65V input common mode VREF for the ESS DAC would probably be an LM4041 or similar. Suggestions welcome.
Cheers!
Russ
Attachments
Thanks for not rolling your eyes too much!
Yes, that's it. Leds for voltage. You could make R40 the voltage reference.
Thinking about the ESS Sabre: it's good news bad news about the lowish output impedance of the chip, around 200 ohms. Good for voltage out with minimal external parts. Good for passive filtering in that mode. Bad news that any modulation/shift of the input current sensing node of the i/v will be proportionally more sensitive than compared to a current out DAC with a higher intrinsic impedance. So, a quiet device to raise V3 to 1.65V is a good idea. Maybe a current source for VR1 for higher PSRR?
How about the final cascode, for Q24,42,45...?
Something is squirrely about the OCM circuit. Do you mean to derive a CM signal that could be made wide or low bandwidth with a cap change?
It is likely that the TI chip uses a wide BW correction loop. Either way, with this discrete circuit, one could add a series R and up C1 to use a low BW subsonic offset loop.
How does removing the (now redundant) cascode from Q11 effect input impedance? Does Q11's dissipation stay low enough with a higher Vce sans cascode? I didn't think of that last cycle...
This is a very promising project!
Yes, that's it. Leds for voltage. You could make R40 the voltage reference.
Thinking about the ESS Sabre: it's good news bad news about the lowish output impedance of the chip, around 200 ohms. Good for voltage out with minimal external parts. Good for passive filtering in that mode. Bad news that any modulation/shift of the input current sensing node of the i/v will be proportionally more sensitive than compared to a current out DAC with a higher intrinsic impedance. So, a quiet device to raise V3 to 1.65V is a good idea. Maybe a current source for VR1 for higher PSRR?
How about the final cascode, for Q24,42,45...?
Something is squirrely about the OCM circuit. Do you mean to derive a CM signal that could be made wide or low bandwidth with a cap change?
It is likely that the TI chip uses a wide BW correction loop. Either way, with this discrete circuit, one could add a series R and up C1 to use a low BW subsonic offset loop.
How does removing the (now redundant) cascode from Q11 effect input impedance? Does Q11's dissipation stay low enough with a higher Vce sans cascode? I didn't think of that last cycle...
This is a very promising project!
Re: Thanks for not rolling your eyes too much!
Yes the cct simulates better with higher impedance sources.
But I think it should do fine with the ESS Sabre.
I added the final cascode. 🙂
And I took out the cascode of the cascode. 😀 Because it only seemed to harm the THD very badly and made the cct hard to stabilize. I am not sure its worth the trouble to add it and its reference voltage.
Now here is what is really cool. The cct simulates much better at each output now (with the new cascode at Q24 et al)
In fact THD comes out virtaully the same at each output to GND or the differential output!!! Thats just amazing to me. 🙂 But this only occurs if I keep the servo at high BW. When I make it sub sonic the THD at each output goes up an order of magnitude.
I also add the CSS for the current into the thermal compensation Qs.
I agree it is promising, and its been a lot of fun too! 🙂
Here it is:
wildmonkeysects said:
How about the final cascode, for Q24,42,45...?
This is a very promising project!
Yes the cct simulates better with higher impedance sources.
But I think it should do fine with the ESS Sabre.
I added the final cascode. 🙂
And I took out the cascode of the cascode. 😀 Because it only seemed to harm the THD very badly and made the cct hard to stabilize. I am not sure its worth the trouble to add it and its reference voltage.
Now here is what is really cool. The cct simulates much better at each output now (with the new cascode at Q24 et al)
In fact THD comes out virtaully the same at each output to GND or the differential output!!! Thats just amazing to me. 🙂 But this only occurs if I keep the servo at high BW. When I make it sub sonic the THD at each output goes up an order of magnitude.
I also add the CSS for the current into the thermal compensation Qs.
I agree it is promising, and its been a lot of fun too! 🙂
Here it is:
Attachments
Simulated THD20 at very sane bias currents:
The first is differential, the second two are each output to GND.
The first is differential, the second two are each output to GND.
Code:
Fourier components of V(out+,out-)
DC component:3.40477e-011
Harmonic Frequency Fourier Normalized Phase Normalized
Number [Hz] Component Component [degree] Phase [deg]
1 2.000e+04 2.801e+00 1.000e+00 -5.96° 0.00°
2 4.000e+04 8.285e-11 2.958e-11 24.48° 30.44°
3 6.000e+04 1.698e-06 6.061e-07 14.84° 20.80°
4 8.000e+04 7.864e-11 2.808e-11 -22.20° -16.24°
5 1.000e+05 1.345e-08 4.802e-09 -172.09° -166.13°
6 1.200e+05 7.786e-11 2.780e-11 -74.09° -68.13°
7 1.400e+05 6.899e-09 2.463e-09 -16.98° -11.02°
8 1.600e+05 7.738e-11 2.763e-11 -127.03° -121.07°
9 1.800e+05 8.275e-09 2.955e-09 142.91° 148.87°
Total Harmonic Distortion: 0.000061%
Fourier components of V(out-)
DC component:0.000959188
Harmonic Frequency Fourier Normalized Phase Normalized
Number [Hz] Component Component [degree] Phase [deg]
1 2.000e+04 1.400e+00 1.000e+00 174.04° 0.00°
2 4.000e+04 4.640e-09 3.313e-09 86.70° -87.34°
3 6.000e+04 8.489e-07 6.061e-07 -165.16° -339.20°
4 8.000e+04 2.047e-09 1.462e-09 118.46° -55.58°
5 1.000e+05 6.722e-09 4.800e-09 7.92° -166.12°
6 1.200e+05 2.007e-09 1.433e-09 -69.91° -243.95°
7 1.400e+05 3.451e-09 2.464e-09 162.99° -11.05°
8 1.600e+05 1.115e-09 7.963e-10 -174.33° -348.37°
9 1.800e+05 4.138e-09 2.955e-09 -37.07° -211.11°
Total Harmonic Distortion: 0.000061%
Fourier components of V(out+)
DC component:0.000959188
Harmonic Frequency Fourier Normalized Phase Normalized
Number [Hz] Component Component [degree] Phase [deg]
1 2.000e+04 1.400e+00 1.000e+00 -5.96° 0.00°
2 4.000e+04 4.679e-09 3.341e-09 85.80° 91.76°
3 6.000e+04 8.489e-07 6.061e-07 14.84° 20.80°
4 8.000e+04 1.987e-09 1.419e-09 117.02° 122.98°
5 1.000e+05 6.727e-09 4.804e-09 -172.10° -166.14°
6 1.200e+05 2.085e-09 1.489e-09 -70.07° -64.11°
7 1.400e+05 3.449e-09 2.462e-09 -16.95° -10.99°
8 1.600e+05 1.169e-09 8.348e-10 -171.54° -165.58°
9 1.800e+05 4.137e-09 2.954e-09 142.89° 148.85°
Total Harmonic Distortion: 0.000061%
matejS said:Since Sabre is a voltage out w/ 195ohm output resistance, I say it should be referenced to 0V (you will get a little less than 9mA of bias current). Sabre output is really quite good and can handle output input impedance w/o problems (there is a little THD loss due to internal resistors' temperature coefficient).
But I might be wrong 😉
Cheers,
Matej
analog_sa said:
It is?
Matej,
You are quite right actually.
I have been conversing with Dustin about the Sabre output.
The Sabre is indeed truly a voltage output DAC.
For the Buffalo DAC it just happens to work like this:
The output impedance is 50K/64/4 = ~195R. The bias voltage is exactly AVCC/2 and the voltage swing is 0.924 * AVCC.
So it is quite correct to simulate it as a voltage in series with a resistance, and we have the exact value extents to use. 🙂
Cheers!
Russ
Thanks for getting the answer to that mystery out, Russ. I know I'm in over my head, but I kept thinking it had to actually be voltage out.
When you guys get to this circuit, do you plan to release it in your standard form factor or have you decided on possibly using a different one, maybe to fit more parts on?
When you guys get to this circuit, do you plan to release it in your standard form factor or have you decided on possibly using a different one, maybe to fit more parts on?
The whole voltage/current thing gets really murky and grey sometimes.
You can basically argue that any amplifier is a current source, because it has an *some* output impedance. But you can also say any current with a low enough impedance is a voltage....
195R by most standard is smack in the middle. Not low, but not really high either. The thing that settles it for me, is the way in which the current/voltage is generated. 🙂) OK that's clear as mud...
I think it more critical to look at the performance of the DAC into a given load.
The Sabre likes a low impedance for best results. Into a high impedance the results are still good, but not as good. 🙂
Yes, I won't argue there may be thermal effects for 0Vbias VS AVCC/2 bias. But I think IVY is a case study which proves its not that big a deal. 🙂 Purely aesthetically, it rocks.
We are talking 256 50K resistors. How much difference does 1.65V make to a 50K resistor?
Cheers!
Russ
You can basically argue that any amplifier is a current source, because it has an *some* output impedance. But you can also say any current with a low enough impedance is a voltage....
195R by most standard is smack in the middle. Not low, but not really high either. The thing that settles it for me, is the way in which the current/voltage is generated. 🙂) OK that's clear as mud...
I think it more critical to look at the performance of the DAC into a given load.
The Sabre likes a low impedance for best results. Into a high impedance the results are still good, but not as good. 🙂
Yes, I won't argue there may be thermal effects for 0Vbias VS AVCC/2 bias. But I think IVY is a case study which proves its not that big a deal. 🙂 Purely aesthetically, it rocks.
We are talking 256 50K resistors. How much difference does 1.65V make to a 50K resistor?
Cheers!
Russ
Russ White said:The whole voltage/current thing gets really murky and grey sometimes.
We are talking 256 50K resistors. How much difference does 1.65V make to a 50K resistor?
Cheers!
Russ
The white paper indicates 6 unity weighted bits per OP, each 4k7,
4k7/6 = 783 ohms. Stereo mode = 783 / 4 = 195 ohms.
Same result, different no of bits?
Or is there actually 64 bits per dac phase as you are alluding, that
sounds like a lot of internal R's??
T
Terry Demol said:Or is there actually 64 bits per dac phase as you are alluding, that
sounds like a lot of internal R's??
T
It is a lot of Rs. Which would be a good thing I suppose. 🙂
50K/64/4 is precisely the figure Dustin gave me. So I am taking his word for it. 🙂
Russ White said:
It is a lot of Rs. Which would be a good thing I suppose. 🙂
50K/64/4 is precisely the figure Dustin gave me. So I am taking his word for it. 🙂
Yes, more bits = better resolution, all other things being equal.
I'll check it out on the other thread. In the end, the 195R is the
important value.
T
Undoubtedly, the 195R value is critical, but knowing how you get that value can make a big difference too. 🙂
Also the number of bits does not have to equal the number of resistors. 🙂 They could be paralleled.
Also the number of bits does not have to equal the number of resistors. 🙂 They could be paralleled.
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