Does that mean ideally to have dedicated PS for each clock?It is that under some conditions some audible crosstalk effects can occur when two clocks are installed and if all the clock signals running around the clock board are active.
Using three clock boards, one hosts 22/45M clock only, one for 24/49M, and third one for clock selection/PLL/buffer?
Optimum might be one clock board per oscillator then switch between the outputs with a pair of external relays. One relay for the Reclocker Board, and one relay to switch the 45/49MHz for the USB board. In that case I would probably design a new relay board just for that purpose. Would have to think about it then make a prototype and test it.
The above having been said, I don't hear any problems using the method I suggested, at least under the conditions I tested (Iancanada clocks or lessor).
OTOH, if using sine wave clocks and squaring circuits, especially squaring circuits from Andrea, I would take a close look at how well they are working and their power supply needs. I already sent an email to Andrea with my findings.
The above having been said, I don't hear any problems using the method I suggested, at least under the conditions I tested (Iancanada clocks or lessor).
OTOH, if using sine wave clocks and squaring circuits, especially squaring circuits from Andrea, I would take a close look at how well they are working and their power supply needs. I already sent an email to Andrea with my findings.
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>>One relay for the Reclocker Board, and one relay to switch the 45/49MHz for the USB board.
Does this mean ideally should not use different buffer outputs from same LMK1C1104 chip to Reclocker and USB boards?
It would depend on the specific situation and frequencies the target devices need (the USB board and the Reclocker). If they need the same frequencies, then a single buffer chip could be used with two separate outputs (since buffer ouput skew would not be an issue). In that case separate outputs are probably better. However, in other cases, such as if there were two dacs that need to operate together for stereo then maybe using one buffer output with two separate damping resistors would be better (because buffer output skew could cause imaging problems).
If that's not clear then maybe I could sketch up a schematic of how output switching for two clock boards might work.
If that's not clear then maybe I could sketch up a schematic of how output switching for two clock boards might work.
Thanks, so either use cases is good for single buffer with separate outputs,
I was a bit confused with "One relay for the Reclocker Board, and one relay to switch the 45/49MHz for the USB board."
I was a bit confused with "One relay for the Reclocker Board, and one relay to switch the 45/49MHz for the USB board."
In some cases if we are using 22/24MHz clocks to keep phase noise low in a dac, we may still need 45/49MHz clock signals to drive our USB board synchronously with the dac. In that case we need to switch between two sets of frequencies. There is the 22/24MHz set of frequencies, and there is the 45/49MHz set of frequencies.
If we want to use two clock boards and then do the frequency switching after the clock boards, we will need two relays because there are two sets of frequencies that need to be switched at the same time.
In that case the signals don't need to be buffered again, as good relays are pretty benign in terms of phase noise effects.
However, part of the reason for using two relays is so we can switch the frequencies and switch their grounds too. That's because leaving the grounds connected between two different clock boards could invite more opportunities for crosstalk.
Regarding buffers, they can only output one frequency at a time. If we need two different sets of frequencies then we need two buffers per clock board. OTOH If dac and USB board both operate at 45/49MHz then we could need only one buffer per clock board.
Maybe that's more clear?
If we want to use two clock boards and then do the frequency switching after the clock boards, we will need two relays because there are two sets of frequencies that need to be switched at the same time.
In that case the signals don't need to be buffered again, as good relays are pretty benign in terms of phase noise effects.
However, part of the reason for using two relays is so we can switch the frequencies and switch their grounds too. That's because leaving the grounds connected between two different clock boards could invite more opportunities for crosstalk.
Regarding buffers, they can only output one frequency at a time. If we need two different sets of frequencies then we need two buffers per clock board. OTOH If dac and USB board both operate at 45/49MHz then we could need only one buffer per clock board.
Maybe that's more clear?
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Started looking into the squarer problem for those folks who use sine wave oscillators rather than clock modules. Turns out AD has declared LTC6957-3 EOL. Another common circuit uses 74AC11004, but not sure that's the best alternative. Decided to take a look at how much is actually needed to get get good audio dac performance out of SOA audio oscillators. To that end, an experimenter board is in the works to try different topologies and or devices. Probably a few more days of work before Gerbers are ready for a test board.
Rough idea so far:
Rough idea so far:
You are under full steam Mark 😎 - it would be nice to have a comparison between the sinePI of Ian and the squarer boards from Andrea…
Doede,
I have all three types of squaring boards you mention. Already modified the Andrea squarer boards with some improvement in subjective SQ. IMHO removing all the ferrites helped the most with one. The other had crosstalk issues and might have been worth fixing but the key parts are EOL. Don't recall if I listened to sine_Pi or only looked with a scope. Decided I thought it might be possible to do a little better. Problem is I don't know exactly what I want to do in this case so I decided to make a board to run some tests, and then see what I can find out from that.
I have all three types of squaring boards you mention. Already modified the Andrea squarer boards with some improvement in subjective SQ. IMHO removing all the ferrites helped the most with one. The other had crosstalk issues and might have been worth fixing but the key parts are EOL. Don't recall if I listened to sine_Pi or only looked with a scope. Decided I thought it might be possible to do a little better. Problem is I don't know exactly what I want to do in this case so I decided to make a board to run some tests, and then see what I can find out from that.
Just got an EOL notice on the PLL I used for the clock board:
Thus if anyone is thinking of possibly building the clock board of this thread some day and would rather not design in a new PLL, maybe good to grab one or two before next year. Also, looks like all the recommended substitutes are already obsolete or last time buy, which could further complicate things.
Thus if anyone is thinking of possibly building the clock board of this thread some day and would rather not design in a new PLL, maybe good to grab one or two before next year. Also, looks like all the recommended substitutes are already obsolete or last time buy, which could further complicate things.
Mark, as you also use the LT1763 in your design, I thought it might be ok to post a link to my new blog post on the use of larger bypass caps.
https://blog.dddac.com/dddac1794-mk3-on-board-regulator/
https://blog.dddac.com/dddac1794-mk3-on-board-regulator/
Doede,
Noise bypass cap here is whatever they spec but in C0G. Slowing down the regulator loop may reduce noise, but it may also reduce PSRR. Depends what's needed most, I guess.
Since there is more to the power distribution system than just the regulator bandwidth, and to fill in a little more detail, I have mostly been using a 10uf SMD film output cap for LT1763. Along with a load adjustment resistor, of course 🙂
A lot may also depend on choice of smaller distributed bypass caps along with use of ground and power planes.
Seems to work pretty well although I have not had time to study it in particular detail. Too many other things to do. Squaring circuit test boards will be here soon as well.
Noise bypass cap here is whatever they spec but in C0G. Slowing down the regulator loop may reduce noise, but it may also reduce PSRR. Depends what's needed most, I guess.
Since there is more to the power distribution system than just the regulator bandwidth, and to fill in a little more detail, I have mostly been using a 10uf SMD film output cap for LT1763. Along with a load adjustment resistor, of course 🙂
A lot may also depend on choice of smaller distributed bypass caps along with use of ground and power planes.
Seems to work pretty well although I have not had time to study it in particular detail. Too many other things to do. Squaring circuit test boards will be here soon as well.
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I assume you refer to TPS7A47. That datasheet does not recommend 5x 10uF X7R/X5R but states that recommended output capacitance is 50uF and it also recommends to apply 50% derating on nominal capacitance of ceramic capacitors. So 50uF would require 10x 10uF X7R/X5R.TPS4A7 series benefit more from 47uf low esr tantalum and 0.1uf c0g (preferably rubycon mu), rather than five 10uf x7r/x5r it is recommended in datasheet.
Yes, just swapped typo. Indeed they don't specify, indeed 50uf, x7r/x5r. BUT in their evaluation board, they chose it as a means to lower esr, and layout it as 5x10uf. Even with 50% derate, capacitance drops significantly.
Example of a rather minimally populated clock board:
This one has been settling in overnight. It will be used for testing with the experimental sine wave oscillator squaring boards. Bare boards are expected to arrive later today. Will hopefully know more in a few days.
This one has been settling in overnight. It will be used for testing with the experimental sine wave oscillator squaring boards. Bare boards are expected to arrive later today. Will hopefully know more in a few days.
Thanks Markw4 for sharing.
I wanted to ask : when usingg a relay on suchh critical boards when for audio listening, do we have to isolate the mechanical command of the relays with their own standalone ground layer to avoid noise spead?
I wanted to ask : when usingg a relay on suchh critical boards when for audio listening, do we have to isolate the mechanical command of the relays with their own standalone ground layer to avoid noise spead?
The relays should only make noise in between songs, if and when the clock frequency needs to change. At that time the dac analog outputs should be muted, so no problem is expected there. During the normal operation the relays may be energized with a DC current, but since its DC it shouldn't be a problem. Another possible issue could be with the ground for the USB board clock frequency change request signal. If there is a problem with noise there, the dac board does support the option to optically isolate that signal.
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