Geez, my reading comprehension is down the tubes... heh.
You said not. Yikes.
nvm.
High slope transients are HF... that is the same as a high amplitude leading edge on a cannon, which has a LF component... annoying to think about. So just how much air should a tweeter move to result in a "realistic" reproduction? Heh.
_-_-bear
You said not. Yikes.
nvm.
High slope transients are HF... that is the same as a high amplitude leading edge on a cannon, which has a LF component... annoying to think about. So just how much air should a tweeter move to result in a "realistic" reproduction? Heh.
_-_-bear
Back home from working away.
I have done some more work on the layout and made it a bit more tidy.
Reading back through some posts during the last few days somebody was talking about possible alternatives for the MUR3020's in TO-220 packs.
Can I get confirmation if this is required and that the alternatives will be suitable for the F5. I should be able to provide for some alternate pads if needed.
Andy
I have done some more work on the layout and made it a bit more tidy.
Reading back through some posts during the last few days somebody was talking about possible alternatives for the MUR3020's in TO-220 packs.
Can I get confirmation if this is required and that the alternatives will be suitable for the F5. I should be able to provide for some alternate pads if needed.
Andy
Example : STTH2002C (in standard TO-220 dress)
On fire sale for 42 $cents each at DK
Looks reasonable but quite a bit slower than the MUR3020's.
Is that going to be an issue?
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Would you like the diodes to switch, or slide ?
Me regard the diodes as a torque converter in an automatic transmission, smooth gear change.
(slower ? really ?)
Me regard the diodes as a torque converter in an automatic transmission, smooth gear change.
(slower ? really ?)
Revised F5 v2/3 layout and PSU layout.
Very difficult to add TO-220 diode arrays without reducing track widths dramatically.
Very difficult to add TO-220 diode arrays without reducing track widths dramatically.
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
Looking great UKToecutter.
Maybe you were planning to do it at the end, but I don't see any mounting holes. I know the amp boards could probably be supported by the FET/Diode legs, but I'm a big fan of standoffs too.
Maybe you were planning to do it at the end, but I don't see any mounting holes. I know the amp boards could probably be supported by the FET/Diode legs, but I'm a big fan of standoffs too.
Looking great UKToecutter.
Maybe you were planning to do it at the end, but I don't see any mounting holes. I know the amp boards could probably be supported by the FET/Diode legs, but I'm a big fan of standoffs too.
I was thinking that the amplifier boards would be supported by the FET's being bolted to the heatsinks (I could put some mounting holes if people would like them).
I was planning to put mounting holes on the PSU.
In fact, I'll put them on now.....
UKToecutter:
I really like your layout.
I do not understand many of the test-points. In particular why aren't there test-points for the measuring the bias current, ie. the voltage across the the source resistors? TP10 and TP5 appear to be connecteded to the same trace. Same with TP3 and TP9. What are TP1 and TP2? How are TP11 and TP8 used?
I do not understand why the (wide) traces from the diodes to the MOSFET source pins (and MOSFET side of the source resistors) need to be only on one side of the board. It might be better if the connection from the source-resistors to the MOSFET source pin was on both sides.
I am looking forward to using this board.
I really like your layout.
I do not understand many of the test-points. In particular why aren't there test-points for the measuring the bias current, ie. the voltage across the the source resistors? TP10 and TP5 appear to be connecteded to the same trace. Same with TP3 and TP9. What are TP1 and TP2? How are TP11 and TP8 used?
I do not understand why the (wide) traces from the diodes to the MOSFET source pins (and MOSFET side of the source resistors) need to be only on one side of the board. It might be better if the connection from the source-resistors to the MOSFET source pin was on both sides.
I am looking forward to using this board.
Input transistors including cascodes are very close to high output currents.
Might be an issue?
Might be an issue?
From the F5 manual.
TP10 & TP5 are indeed connected to the same track. I proved the two point to make it obvious which test was being carried out. You don't have to use them if you don't want to (same with TP3 & TP9).
I could add a track to the bottom but it would be narrower than the top track to maintain track to pad and track to track spacing. However, as the tracks to the source are 3mm wide and the board will be 2oz copper not 1oz I thought it unneccesary.
Andy
"Initial Adjustment
Before applying power to the amplifier, you will want to set the values of P1 (TP3&TP4) and P2 (TP5&TP6) to their
minimum. Verify this with an ohmmeter. When it comes times to “fire” up the amp first time,
if you have a Variac, use it, fusing the AC line to the amplifier with a 1A fast blow fuse. Turn
the Variac up slowly, and if you haven’t popped the fuse, then go ahead and confirm the rail
voltages to the channels (TP1& TP2).
Each channel does not need to be attached to a load in order to adjust it. If the only load
you have is the loudspeaker, I would advise against using it during adjustment. For each
channel you will be adjusting P1 and P2 alternately in order to achieve 0 volts DC at the
output (TP7) and .59 volts across R11 (TP8&TP9) and R12 (TP10&TP11). Each time you adjust P1 you will probably have
to go back and adjust P2 again, and so I recommend adjusting the pots in half-measures,
alternately setting the pots half-way to their voltage goals and measuring the DC values.
Unless there is something very wrong, when the output is at 0 V DC, the values across R11
and R12 will be equal.
In spite of the thermal compensation in the circuit, you should assume that there will be drift
as the heat sink temperature rises, and you will need to readjust the values over the course
of an hour or two. Usually it is best to start out bias adjustment low, at maybe 0.4 mV
across R11 and R12 until the amp is warmed up a bit.
You should be able to get the output DC offset down to 10 mV or so, and I would consider
50 mV the highest acceptable figure for this amplifier when warmed up. After the amplifier
has been operated for a few weeks, it is a good idea to check and adjust the offset again
after the parts have been burned in."minimum. Verify this with an ohmmeter. When it comes times to “fire” up the amp first time,
if you have a Variac, use it, fusing the AC line to the amplifier with a 1A fast blow fuse. Turn
the Variac up slowly, and if you haven’t popped the fuse, then go ahead and confirm the rail
voltages to the channels (TP1& TP2).
Each channel does not need to be attached to a load in order to adjust it. If the only load
you have is the loudspeaker, I would advise against using it during adjustment. For each
channel you will be adjusting P1 and P2 alternately in order to achieve 0 volts DC at the
output (TP7) and .59 volts across R11 (TP8&TP9) and R12 (TP10&TP11). Each time you adjust P1 you will probably have
to go back and adjust P2 again, and so I recommend adjusting the pots in half-measures,
alternately setting the pots half-way to their voltage goals and measuring the DC values.
Unless there is something very wrong, when the output is at 0 V DC, the values across R11
and R12 will be equal.
In spite of the thermal compensation in the circuit, you should assume that there will be drift
as the heat sink temperature rises, and you will need to readjust the values over the course
of an hour or two. Usually it is best to start out bias adjustment low, at maybe 0.4 mV
across R11 and R12 until the amp is warmed up a bit.
You should be able to get the output DC offset down to 10 mV or so, and I would consider
50 mV the highest acceptable figure for this amplifier when warmed up. After the amplifier
has been operated for a few weeks, it is a good idea to check and adjust the offset again
TP10 & TP5 are indeed connected to the same track. I proved the two point to make it obvious which test was being carried out. You don't have to use them if you don't want to (same with TP3 & TP9).
I could add a track to the bottom but it would be narrower than the top track to maintain track to pad and track to track spacing. However, as the tracks to the source are 3mm wide and the board will be 2oz copper not 1oz I thought it unneccesary.
Andy
(I could put some mounting holes if people would like them).
Yes please. We have some heavy TO-247 devices on the opposite end, and some high-current PSU wire. There's enough metal at both ends to make me want some support - even though it can be achieved with the board resting on a standoff in the non-coppered areas, a hole or two per side wouldn't be hated.
Input transistors including cascodes are very close to high output currents.
Might be an issue?
Yes, seems to be.
I've moved them closer to the JFETs
Has anyone reviewed the universal mounting spec for this board? I would be grateful if the F5 v2/3 boards could abide by it.
I now understand the problem: the source resistor designations have changed from the F5-Manual to the F5-Turbo-V3 schematic. Your layout has test points across R11 and R12, for bias adjustments, which were the correct resistor designations for the F5, but not the F5-Turbo. You need to measure bias voltages across R17 (or R18, r19, R20 ...) and R21 (or R22, R23, R24, ...).
...
From the F5 manual.
"Initial Adjustment...
For each channel you will be adjusting P1 and P2 alternately in order to achieve 0 volts DC at the
output (TP7) and .59 volts across R11 (TP8&TP9) and R12 (TP10&TP11). Each time you adjust P1 you will probably have
to go back and adjust P2 again, and so I recommend adjusting the pots in half-measures,
Has anyone reviewed the universal mounting spec for this board? I would be grateful if the F5 v2/3 boards could abide by it.
Skunark
It can't be followed for this board.
The UMS has a 40mm pitch between the MOSFETs. That would make this board too large for the heatsinks that are proposed.
I now understand the problem: the source resistor designations have changed from the F5-Manual to the F5-Turbo-V3 schematic. Your layout has test points across R11 and R12, for bias adjustments, which were the correct resistor designations for the F5, but not the F5-Turbo. You need to measure bias voltages across R17 (or R18, r19, R20 ...) and R21 (or R22, R23, R24, ...).
[/LEFT]
[/FONT]...
Oh bugger,
Thats a faux pas from me.
I assumed he'd kept the same resource designators.
Humbled and embaressed.
I'll correct that now.
Sorry
Skunark
It can't be followed for this board.
The UMS has a 40mm pitch between the MOSFETs. That would make this board too large for the heatsinks that are proposed.
How about when only 2 MOSFETS per rail are used, such as Q9, Q3, Q5 and Q11? Can the UMS spacing be made work for that situation?
How about when only 2 MOSFETS per rail are used, such as Q9, Q3, Q5 and Q11? Can the UMS spacing be made work for that situation?
Probably, but that would mean a seperate v2 and v3 board
Probably, but that would mean a seperate v2 and v3 board
BTW: You should change the designation on your layout to:
"F5 Turbo v3" rather than "F5 Turbo v2".
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